Method for manufacturing package substrate

Patent metadata

Field	Value
Publication number	US-2025218795-A1
Application number	US-202418954574-A
Country	US
Kind code	A1
Filing date	Nov 21, 2024
Priority date	Dec 28, 2023
Publication date	Jul 3, 2025
Grant date	—

Abstract

A method of manufacturing a package substrate, which mainly uses an adhesive material to bond two metal sheets to each other to form a circuit base-material board with sufficient rigidity. In addition to eliminating the need for a carrier board to save production costs, the method can also perform pattern development, etching, RCC lamination (Resin Coated Copper) and other manufacturing processes on both sides of the circuit base-material board simultaneously to produce a package substrate with a single layer of circuits, and can effectively and significantly improve the production efficiency and capacity of package substrate.

First claim

What is claimed is:

1 . A method for manufacturing a package substrate, comprising:
providing a circuit base-material board, wherein the circuit base-material board comprises two metal plates and an adhesive material, each of the two metal plates has a first surface and a second surface opposite each other, the adhesive material is provided between the two metal plates and is adhesively bonded to each of the first surfaces of the two metal plates; implementing a first development process, which comprises: forming a patterned first protection layer on each of the second surfaces of the two metal plates; implementing a first etching process, which comprises: etching to remove metal material on each of the second surfaces of the two metal plates that is not covered by the first protection layer to form a plurality of first openings; implementing a second etching process, which comprises: etching to remove the first protection layer to expose each of the second surfaces of the two metal plates; implementing a lamination process, which includes: on each of the second surfaces of the two metal plates, performing lamination with an insulating film material having a metal surface on one side surface to form an insulating film layer on each of the second surfaces, wherein an outer surface of the insulating film layer has a metal surface, and the insulating film layer covers each of the second surfaces and fills each of the first openings; implementing a second development process, which includes: forming a patterned second protection layer on the metal surface of each of the insulating film layers, wherein an area covered by each of the second protection layers on the metal surface of each of the insulating film layers corresponds to each of the first openings; implementing a third etching process, which includes: etching to remove metal material on the metal surface of the area on each of the insulating film layers that is not covered by the second protection layer, to expose insulation surface of the insulating film layer at the corresponding position, wherein the metal surface covered by the second protection layer serves as a patterned third protection layer; implementing a fourth etching process, which includes: etching to remove the second protection layer and insulating surface exposed from the insulating film layer, to expose surface at corresponding position on each of the second surfaces of the two metal plates; implementing a fifth etching process, which includes: etching to remove the third protection layer, to expose insulating surface of the insulating film layer at a corresponding position originally covered by the third protection layer; implementing a board removal process, which includes: separating the two metal plates from the adhesive material, to obtain two package substrate semi-finished products; implementing a third development process, which includes: forming a patterned fourth protection layer on the first surface of the metal plate in the package substrate semi-finished product, and an area covered by the fourth protection layer on the first surface corresponds each of the first openings of the second surface; implementing a surface treatment process, which includes: forming a patterned surface treatment layer on a metal surface area exposed from the first surface and the second surface; implementing a sixth etching process, which includes: etching to remove the fourth protection layer, to expose metal surface of the first surface that is not covered by the surface treatment layer on the metal plate; and implementing a seventh etching process, which includes: etching to remove the metal material of the first surface of the metal plate in an area that is not covered by the surface treatment layer to form a plurality of second openings, wherein a bottom of each of the second openings is connected to a bottom of each of the first openings at its corresponding position, and the insulating film layer filled in each of the first openings is exposed at a bottom of each of the second openings at its corresponding position to obtain a package substrate.

2 . The method for manufacturing the package substrate according to claim 1 , wherein composition of the first protection layer, the second protection layer or the fourth protection layer is a dry film, a photosensitive resin composition or a photosensitive resin film.

3 . The method for manufacturing the package substrate according to claim 1 , wherein composition of the third protection layer is copper metal.

4 . The method for manufacturing the package substrate according to claim 1 , wherein the board removal process further comprises performing a high-temperature baking process or a low-temperature baking process before separating the two metal plates from the adhesive material.

5 . The method for manufacturing the package substrate according to claim 1 , wherein composition of the surface treatment layer is nickel, palladium, platinum, gold or a combination thereof, or an alloy thereof.

Assignees

• Phoenix Pioneer Technology Co Ltd

Inventors

• Wang Ying-Tung
• Hsu Shih-Ping

Classifications

• H10W90/755

  between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W70/685 Primary

  comprising multiple insulating layers · CPC title

• H10W70/095

  of vias therein · CPC title

• H10W70/05 Primary

  of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title