Adapter device for chip packaging test

Patent metadata

Field	Value
Publication number	US-2025194323-A1
Application number	US-202218846218-A
Country	US
Kind code	A1
Filing date	Mar 24, 2022
Priority date	Mar 24, 2022
Publication date	Jun 12, 2025
Grant date	—

Abstract

An adapter device for chip packaging test is disclosed in the present disclosure. The adapter device for chip packaging test includes: a connection plate comprising a plurality of packaging testing units. Each packaging testing unit includes: a plate slot for accommodating a micro chip, a signal transmission sheet coupled with the plate slot, a signal connector coupled with the plate slot, and a chip substrate. In some embodiments, the adapter device for chip packaging test further includes: an adapter plate coupled with the connection plate through an inter-plate connection region included in the adapter plate. A method for chip packaging testing includes bonding a plurality of the micro chips to the chip substrates of the connection plate, coupling the connection plate with the adapter plate, inspecting the plurality of micro chips, and identifying a faulty micro chip using the identification code.

First claim

1 . An adapter device for chip packaging test, comprising:
a connection plate comprising a plurality of packaging testing units, each packaging testing unit including:
a plate slot for accommodating a micro chip,
a signal transmission sheet coupled with the plate slot,
a signal connector coupled with the plate slot, and
a chip substrate; and
an adapter plate coupled with the connection plate through an inter-plate connection region included in the adapter plate.

2 . The adapter device for chip packaging test according to claim 1 , wherein the adapter plate further includes: a plurality of connectors to couple with the plurality of corresponding signal connectors of the connection plate.

3 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate is a flexible printed circuit (FPC) plate.

4 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate has a horizontal dimension of 70 mm-90 mm, and a vertical dimension of 40 mm-50 mm.

5 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate has a thickness of 0.2 mm-0.6 mm.

6 . The adapter device for chip packaging test according to claim 1 , wherein the signal transmission sheet is an FPC board containing data transmission lines.

7 . The adapter device for chip packaging test according to claim 1 , wherein a first end of the signal transmission sheet is integrally formed with an upper portion of the plate slot and is clamped in the signal connector.

8 . The adapter device for chip packaging test according to claim 7 , wherein a second end of the signal transmission sheet is connected to an electrical connection end of the chip substrate

9 . The adapter device for chip packaging test according to claim 1 , wherein a front surface of the signal connector includes a flash memory chip packaged in a shielded enclosure.

10 . The adapter device for chip packaging test according to claim 1 , wherein a surface of the shielded enclosure has a plurality of pin holes.

11 . The adapter device for chip packaging test according to claim 1 , wherein a surface of the signal connector has a protruding connector.

12 . The adapter device for chip packaging test according to claim 1 , wherein a surface of the chip substrate is made of an iron-nickel alloy.

13 . The adapter device for chip packaging test according to claim 1 , wherein the plate slot accommodates a micro-LED chip and has a corresponding size according to the micro-LED chip.

14 . The adapter device for chip packaging test according to claim 1 , wherein a diameter of the plate slot is less than 6 μm

15 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate includes an identification code on a surface of the connection plate.

16 . The adapter device for chip packaging test according to claim 15 , wherein the identification code is a two-dimensional code.

17 . The adapter device for chip packaging test according to claim 2 , wherein the plurality of connectors of the adapter plate are recessed connectors.

18 . The adapter device for chip packaging test according to claim 1 , wherein the adapter plate includes a plurality of device connectors to attach to a vacuum suction table for packaging testing.

19 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate includes a plurality of through holes and a plurality of cross marks.

20 . The adapter device for chip packaging test according to claim 1 , wherein the connection plate includes a plurality of positioning holes to connect to a machine table for packaging testing.

21 . The adapter device for chip packaging test according to claim 1 , wherein the adapter plate includes a plurality of positioning pin holes.

22 . The adapter device for chip packaging test according to claim 1 , wherein a micro-LED display chip is integrated on the chip substrate by Die Bonding and Wire Bonding

23 . A method for chip packaging testing, comprising:
providing a connection plate comprising an identification code and a plurality of packaging testing units, each packaging testing unit including:
a plate slot for accommodating a micro chip,
a signal transmission sheet coupled with the plate slot,
a signal connector coupled with the plate slot, and
a chip substrate;
bonding a plurality of the micro chips to the chip substrates of the connection plate; providing an adapter plate; coupling the connection plate with the adapter plate; inspecting the plurality of micro chips; and identifying a faulty micro chip using the identification code.

24 . The method for chip packaging testing according to claim 23 , wherein the micro chip is a micro-LED display chip.

25 . The method for chip packaging testing according to claim 24 , wherein inspecting the plurality of micro chips includes inspecting a light-emitting condition of the micro-LED display chips.

26 . The method for chip packaging testing according to claim 23 , wherein the connection plate is a flexible printed circuit (FPC) plate.

27 . The method for chip packaging testing according to claim 23 , wherein the adapter plate further includes a plurality of connectors to couple with the plurality of corresponding signal connectors of the connection plate.

Assignees

• Jade Bird Display Shanghai Ltd

Inventors

• Xu Chenchao
• Yue Yang

Classifications

• G01R31/2896

  Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title

• G01R31/2635 Primary

  Testing light-emitting diodes, laser diodes or photodiodes · CPC title

• G06K19/06037

  multi-dimensional coding · CPC title

• G01R31/2844

  using test interfaces, e.g. adapters, test boxes, switches, PIN drivers (G01R31/2889 takes precedence) · CPC title

• G01R31/2825

  in household appliances or professional audio/video equipment (testing LAN's H04L43/50; testing TV systems H04N17/00; testing loudspeakers H04R29/00) · CPC title