Display panel and display apparatus including the same

US2025185367A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025185367-A1
Application numberUS-202519045428-A
CountryUS
Kind codeA1
Filing dateFeb 4, 2025
Priority dateAug 6, 2020
Publication dateJun 5, 2025
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel includes: a substrate including a main display area, a component area, and a peripheral area; a main sub-pixel at the main display area on the substrate; a main pixel circuit connected to the main sub-pixel, and including a main storage capacitor; an auxiliary sub-pixel at the component area on the substrate; an auxiliary pixel circuit at the peripheral area on the substrate, and including an auxiliary storage capacitor; and a connecting line connecting the auxiliary sub-pixel to the auxiliary pixel circuit. A capacity of the auxiliary storage capacitor is greater than a capacity of the main storage capacitor.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel comprising: a substrate including a first area and a second area; a plurality of first display elements disposed on the first area; a plurality of first circuits, one of the plurality of first circuits overlapping with a corresponding one of the plurality of first display elements, and being electrically connected to the corresponding one of the plurality of first display elements; a plurality of second display elements disposed on the second area; and a plurality of second circuits disposed outside of the second area, one of the plurality of second circuits being electrically connected to a corresponding one of the plurality of second display elements, the plurality of second circuits non-overlapping with the plurality of second display elements in a plan view, wherein the plurality of second circuits is arranged to at least partially surround the first area. 2 . The display panel of claim 1 , wherein a capacity of a second storage capacitor included in one of the plurality of second circuits is greater than a capacity of a first storage capacitor included in one of the plurality of first circuits. 3 . The display panel of claim 2 , wherein the second storage capacitor comprises a first lower electrode, a second lower electrode, and an upper electrode, and wherein the first lower electrode and the second lower electrode are at a same layer as each other and spaced from each other. 4 . The display panel of claim 1 , wherein the second area includes a third area that at least partially surrounds at least one of the plurality of second display elements. 5 . The display panel of claim 4 , wherein the third area is disposed between at least some of the plurality of second display elements. 6 . The display panel of claim 1 , further comprising a connecting line connecting one of the plurality of second display elements to a corresponding one of the plurality of second circuits, wherein the connecting line comprises a transparent conductive oxide material. 7 . The display panel of claim 6 , wherein the connecting line comprises a first connecting line and a second connecting line, the first connecting line comprising a different material from that of the second connecting line, and wherein the first connecting line and the second connecting line are at a same layer as each other, and an end of the second connecting line contacts an end of the first connecting line. 8 . The display panel of claim 6 , wherein the connecting line comprises a first connecting line and a second connecting line, the first connecting line comprising a different material from that of the second connecting line, and wherein the first connecting line and the second connecting line are at different layers from each other and connected to each other via a contact hole. 9 . The display panel of claim 1 , further comprising: an inorganic insulating layer between the substrate and at least one of the plurality of second display elements; and a planarization layer between the inorganic insulating layer and at least one of the plurality of second display elements, wherein the inorganic insulating layer has a hole or a groove at the second area, and the planarization layer is filled in the hole or the groove. 10 . The display panel of claim 1 , wherein at least one of the plurality of second display elements includes a pixel electrode, a first light-emitting region, a second light-emitting region, and an opposing electrode, and wherein the first light-emitting region and the second light-emitting region are spaced apart from each other on the pixel electrode. 11 . A display apparatus comprising: a display panel; and a component under the display panel, the display panel comprising: a substrate including a first area and a second area; a plurality of first display elements disposed on the first area; a plurality of first circuits, one of the plurality of first circuits overlapping with a corresponding one of the plurality of first display elements, and being electrically connected to the corresponding one of the plurality of first display elements; a plurality of second display elements disposed on the second area; and a plurality of second circuits disposed outside of the second area, one of the plurality of second circuits being electrically connected to a corresponding one of the plurality of second display elements, the plurality of second circuits non-overlapping with the plurality of second display elements in a plan view, wherein the plurality of second circuits is arranged to at least partially surround the first area. 12 . The display apparatus of claim 11 , wherein a capacity of a second storage capacitor included in one of the plurality of second circuits is greater than a capacity of a first storage capacitor included in one of the plurality of first circuits. 13 . The display apparatus of claim 12 , wherein the second storage capacitor comprises a first lower electrode, a second lower electrode, and an upper electrode, and wherein the first lower electrode and the second lower electrode are at a same layer as each other and spaced from each other. 14 . The display apparatus of claim 11 , wherein the second area includes a third area that at least partially surrounds at least one of the plurality of second display elements. 15 . The display apparatus of claim 11 , further comprising a connecting line connecting one of the plurality of second display elements to a corresponding one of the plurality of second circuits, wherein the connecting line comprises a transparent conductive oxide material. 16 . The display apparatus of claim 15 , wherein the connecting line comprises a first connecting line and a second connecting line, the first connecting line comprising a different material from that of the second connecting line, and wherein the first connecting line and the second connecting line are at a same layer as each other, and an end of the second connecting line contacts an end of the first connecting line. 17 . The display apparatus of claim 15 , wherein the connecting line comprises a first connecting line and a second connecting line, the first connecting line comprising a different material from that of the second connecting line, and wherein the first connecting line and the second connecting line are at different layers from each other and connected to each other via a contact hole. 18 . The display apparatus of claim 11 , further comprising: an inorganic insulating layer between the substrate and at least one of the plurality of second display elements; and a planarization layer between the inorganic insulating layer and at least one of the plurality of second display elements, wherein the inorganic insulating layer has a hole or a groove at the second area, and the planarization layer is filled in the hole or the groove. 19 . The display apparatus of claim 11 , wherein at least one of the plurality of second display elements includes a pixel electrode, a first light-emitting region, a second light-emitting region, and an opposing electrode, and wherein the first light-emitting region and the second light-emitting region are spaced apart from each other on the pixel electrode. 20 . The display apparatus of claim 11 , wherein the component overlaps with the second area.

Assignees

Inventors

Classifications

  • Electrodes · CPC title

  • OLEDs integrated with inorganic image sensors · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

  • Constructional details · CPC title

  • wherein the TFTs are in active matrices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2025185367A1 cover?
A display panel includes: a substrate including a main display area, a component area, and a peripheral area; a main sub-pixel at the main display area on the substrate; a main pixel circuit connected to the main sub-pixel, and including a main storage capacitor; an auxiliary sub-pixel at the component area on the substrate; an auxiliary pixel circuit at the peripheral area on the substrate, an…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/1216. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 05 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).