Semiconductor light-emitting device, manufacturing method thereof, and display apparatus including the same

Patent metadata

Field	Value
Publication number	US-2025176321-A1
Application number	US-202418960967-A
Country	US
Kind code	A1
Filing date	Nov 26, 2024
Priority date	Nov 28, 2023
Publication date	May 29, 2025
Grant date	—

Abstract

A semiconductor light-emitting device includes a light-emitting stack structure including a first semiconductor layer, an active layer provided on the first semiconductor layer, and a second semiconductor layer provided on the active layer, and a first passivation film provided on a side surface of the light-emitting stack structure.

First claim

What is claimed is:

1 . A semiconductor light-emitting device, comprising:
a light-emitting stack structure including a first semiconductor layer, an active layer provided on the first semiconductor layer, and a second semiconductor layer provided on the active layer; and a first passivation film provided on a side surface of the light-emitting stack structure, wherein the light-emitting stack structure is configured to emit light having an emission peak wavelength in a range of about 400 nm to about 550 nm, and wherein the first passivation film includes a tantalum oxide (TaxOy), and a composition ratio of the tantalum oxide of the first passivation film has a range of 0.1≤y/x≤10.

2 . The semiconductor light-emitting device of claim 1 , wherein a thickness of the first passivation film is in a range of about 1 nm to about 50 nm.

3 . The semiconductor light-emitting device of claim 1 , wherein the first passivation film includes Ta 2 O 3 or Ta 2 O 5 .

4 . The semiconductor light-emitting device of claim 1 , further comprising a second passivation film provided on the first passivation film,
wherein the second passivation film includes at least one of SiO 2 , SiN, SiCN, SiOC, SiON, SiOCN, HfO x , AlO x , ZrO x , AlN, AlO x N y , Ta 2 O 3 , or Ta 2 O 5 .

5 . The semiconductor light-emitting device of claim 4 , wherein the second passivation film is stacked in one to five layers.

6 . The semiconductor light-emitting device of claim 4 , wherein the second passivation film includes an amorphous material.

7 . The semiconductor light-emitting device of claim 4 , wherein the second passivation film has a thickness in a range of about 1 nm to about 15 nm.

8 . The semiconductor light-emitting device of claim 1 , wherein the first semiconductor layer includes a core rod, a plurality of nanopores open in an outward direction from the core rod, and quantum dots dispersed in the plurality of nanopores.

9 . The semiconductor light-emitting device of claim 8 , wherein the plurality of nanopores are arranged radially from the core rod in a transverse section of the first semiconductor layer.

10 . The semiconductor light-emitting device of claim 9 , wherein a diameter of the core rod is in a range of about ⅓ to about ⅕ of a diameter of the light-emitting stack structure.

11 . The semiconductor light-emitting device of claim 1 , wherein the semiconductor light-emitting device has a diameter in a range of about 0.5 μm to about 2 μm.

12 . The semiconductor light-emitting device of claim 1 , wherein the semiconductor light-emitting device has a height in a range of about 2 μm to about 7 μm.

13 . A display apparatus comprising:
a plurality of pixel electrodes; a common electrode corresponding to the plurality of pixel electrodes; a plurality of semiconductor light-emitting devices connected between each pixel electrode of the plurality of pixel electrodes and the common electrode; and a driver circuit layer configured to drive the plurality of semiconductor light-emitting devices, wherein each semiconductor light-emitting device of the plurality of semiconductor light-emitting devices comprises: a light-emitting stack structure including a first semiconductor layer, an active layer provided on the first semiconductor layer, and a second semiconductor layer provided on the active layer; and a first passivation film provided a side surface of the light-emitting stack structure, wherein the light-emitting stack structure is configured to emit light having an emission peak wavelength in a range of about 400 nm to about 550 nm, and wherein the first passivation film includes a tantalum oxide (TaxOy), and a composition ratio of the tantalum oxide of the first passivation film has a range of 0.1≤y/x≤10.

14 . The display apparatus of claim 13 , wherein a thickness of the first passivation film is in a range of about 1 nm to about 50 nm.

15 . The display apparatus of claim 13 , wherein the first passivation film includes Ta 2 O 3 or Ta 2 O 5 .

16 . The display apparatus of claim 13 , wherein each semiconductor light-emitting device further comprises a second passivation film provided on the first passivation film, and
wherein the second passivation film includes at least one of SiO 2 , SiN, SiCN, SiOC, SiON, SiOCN, HfO x , AlO x , ZrO x , AlN, AlO x N y , Ta 2 O 3 , or Ta 2 O 5 .

17 . The display apparatus of claim 16 , wherein the second passivation film has a thickness in a range of about 1 nm to about 15 nm.

18 . The display apparatus of claim 13 , wherein the first semiconductor layer includes a core rod, a plurality of nanopores open in an outward direction from the core rod, and quantum dots dispersed in the plurality of nanopores.

19 . A method of manufacturing a semiconductor light-emitting device, the method comprising:
forming a first semiconductor layer on a substrate; forming an active layer on the first semiconductor layer; forming a second semiconductor layer on the active layer; forming a plurality of light-emitting stack structures by etching the first semiconductor layer, the active layer, and the second semiconductor layer; and depositing a first passivation film on the plurality of light-emitting stack structures, wherein the plurality of light-emitting stack structures are configured to emit light having an emission peak wavelength in a range of about 400 nm to about 550 nm, and wherein the first passivation film includes a tantalum oxide (TaxOy), and a composition ratio of the tantalum oxide of the first passivation film has a range of 0.1≤y/x≤10.

20 . The method of claim 19 , wherein a deposition temperature of the first passivation film is 250° C. or less.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Han Joohun
• Kim Joosung
• Baik Chanwook
• Choi Junhee
• Han Narae

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10H20/034

  of coatings · CPC title

• H10H20/831

  characterised by their shape · CPC title

• H10H20/857

  Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

• H10H20/819

  characterised by their shape, e.g. curved or truncated substrates · CPC title