Semiconductor package including heat radiation structure, cooling system applying the semiconductor package, substrate including heat radiation structure and method of manufacturing the substrate

US2025174521A9 · US · A9

Patent metadata
FieldValue
Publication numberUS-2025174521-A9
Application numberUS-202217964032-A
CountryUS
Kind codeA9
Filing dateOct 12, 2022
Priority dateFeb 21, 2022
Publication dateMay 29, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a semiconductor package including a heat radiation structure, a cooling system applying the semiconductor package, a substrate including a heat radiation structure, and a method of manufacturing the substrate, and more particularly, a semiconductor package including a heat radiation structure, a cooling system applying the semiconductor package, a substrate including a heat radiation structure, and a method of manufacturing the substrate, in which an area contacting a coolant enlarges through heat radiating posts having various forms and structures and a coolant flow path is formed by post holes so that heat generated from semiconductor chips may be efficiently cooled.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor package having a heat radiation structure, the semiconductor package comprising: at least one substrate comprising a heat radiating metal layer, to which heat radiating posts are structurally joined, and at least one insulating layer; at least one semiconductor chip comprising a lower surface bonded to the substrate and an upper surface electrically connected to a terminal lead through an electrical signal line; and a molding housing covering the semiconductor chips, a part of the terminal lead, and a part of or the entire substrate, wherein the heat radiating posts are formed to be exposed to the upper surface, the lower surface, or the upper and lower surfaces of the molding housing, an area of the insulating layer is larger than an area of the heat radiating metal layer, the insulating layer is extended outward from the edge of the heat radiating metal layer by a predetermined extended distance in the molding housing, a distance from the bottom of the insulating layer to the bottom of the molding housing, where the heat radiating posts are exposed, is 40 μm through 4 mm, at least one post hole is interposed between the heat radiating posts which are arranged and spaced apart from each other by a regular interval so as to form a coolant flow path, and a coolant of a cooling system used to cool heat generated from the semiconductor chips circulates the coolant flow path. 2 . The semiconductor package of claim 1 , wherein the at least one substrate comprises the at least one heat radiating metal layer, the insulating layer stacked on the heat radiating metal layer, and a metal pattern layer comprising the semiconductor chips installed thereon which is stacked on the insulating layer. 3 . The semiconductor package of claim 2 , wherein a metal adhesive layer having a thickness thinner than the thickness of the metal pattern layer or the heat radiating metal layer is interposed between the insulating layer and the metal pattern layer or between the insulating layer and the heat radiating metal layer. 4 . The semiconductor package of claim 1 , wherein the heat radiating posts are formed by being masked using a screen mask or a stencil mask, printing metal paste or non-metal paste onto the heat radiating metal layer, and then, being hardened. 5 . The semiconductor package of claim 1 , wherein the heat radiating metal Layer and the heat radiating posts comprise an adhesive layer interposed therebetween to be joined to each other. 6 . The semiconductor package of claim 1 , wherein the heat radiating posts have at least one wave-form structure where the crest of the wave is joined to the bottom surface of the heat radiating metal layer and at least one post hole is formed between each neighbored crest between the heat radiating metal layer and the wave-form structure. 7 . The semiconductor package of claim 6 , wherein the wave-form structure is bonded to the heat radiating metal layer by using ultrasonic welding. 8 . The semiconductor package of claim 1 , wherein the at least one heat radiating post comprises at least one post connecting frame structurally joined to one surface thereof to form a post connection part. 9 . The semiconductor package of claim 8 , wherein the heat radiating posts comprise adhesive layers on the upper surfaces, the lower surfaces, or the upper and lower surfaces thereof. 10 . The semiconductor package of claim 8 , wherein the post connecting frame comprises an adhesive layer on the upper surface thereof. 11 . The semiconductor package of claim 8 , wherein the heat radiating metal layer comprises at least one layered post connection part stacked on the bottom surface thereof. 12 . The semiconductor package of claim 1 , wherein the distance between the heat radiating metal layer and the heat radiating posts is 10 μm through 3 mm. 13 . The semiconductor package of claim 1 , wherein a first distance from the lower end part of the insulating layer to the upper end part of the heat radiating metal layer is shorter than a second distance from the lower end part of the insulating layer to the lower end part of the heat radiating metal layer. 14 . The semiconductor package of claim 13 , wherein a gap between the first distance and the second distance is 1 μm through 200 μm. 15 . The semiconductor package of claim 8 , wherein the post connecting frame is inserted into the cooling system. 16 . The semiconductor package of claim 1 , wherein the heat radiating metal layer and the heat radiating posts are formed of the same material. 17 . The semiconductor package of claim 1 , wherein the extended distance is 5 μm through 3 mm. 18 . The semiconductor package of claim 1 , wherein the heat radiating posts are joined to the substrate after a molding process of the molding housing. 19 . A substrate having a heat radiating structure comprising: a heat radiating metal layer to which heat radiating posts are structurally joined; and the at least one insulating layer stacked on the heat radiating metal layer, wherein an area of the insulating layer is larger than an area of the heat radiating metal layer, the insulating layer is extended outward from the edge of the heat radiating metal layer by a predetermined extended distance, at least one post hole is interposed between the heat radiating posts which are arranged and spaced apart from each other by a regular interval so as to form a coolant flow path, and a coolant of a cooling system circulates the coolant flow path. 20 . A method of manufacturing a substrate having a heat radiating structure, the method comprising: preparing at least one insulating layer; forming a heat radiating metal layer on one surface of the insulating layer; and structurally joining the heat radiating posts to the heat radiating metal layer, wherein an area of the insulating layer is larger than an area of the heat radiating metal layer, the insulating layer is extended outward from the edge of the heat radiating metal layer by a predetermined extended distance, at least one post hole is interposed between the heat radiating posts which are arranged and spaced apart from each other by a regular interval so as to form a coolant flow path, and a coolant of a cooling system circulates the coolant flow path.

Assignees

Inventors

Classifications

  • Encapsulations, e.g. protective coatings · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • of die-attach connectors · CPC title

  • Die-attach connectors · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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What does patent US2025174521A9 cover?
Provided is a semiconductor package including a heat radiation structure, a cooling system applying the semiconductor package, a substrate including a heat radiation structure, and a method of manufacturing the substrate, and more particularly, a semiconductor package including a heat radiation structure, a cooling system applying the semiconductor package, a substrate including a heat radiatio…
Who is the assignee on this patent?
Jmj Korea Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W40/47. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A9). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).