Power Converter Circuit For Use with Multiple Low-Current Power Rails

Patent metadata

Field	Value
Publication number	US-2025149984-A1
Application number	US-202519018305-A
Country	US
Kind code	A1
Filing date	Jan 13, 2025
Priority date	Jan 11, 2023
Publication date	May 8, 2025
Grant date	—

Abstract

A power management circuit for computer systems includes a power converter circuit that generates different voltage levels at different time periods. Multiple voltage regulator circuits are coupled to the output of the power converter circuit and to respective local power supply nodes. Switch devices are used to bypass the voltage regulator circuits during corresponding ones of the different time periods.

First claim

What is claimed is:

1 . An apparatus, comprising:
a power converter circuit configured to generate a plurality of voltage levels on a converter node during a plurality of time periods having adjustable durations; a plurality of voltage regulator circuits coupled to the converter node and configured to generate respective voltage levels on a plurality of local power supply nodes based on a voltage level of the converter node; and a plurality of switch devices coupled between the converter node and corresponding local power supply nodes of the plurality of local power supply nodes, wherein a given switch device of the plurality of switch devices is configured to bypass a given voltage regulator circuit of the plurality of voltage regulator circuits during a given time period of the plurality of time periods in response to receipt, by the given switch device, of a bypass signal generated by the power converter circuit.

2 . The apparatus of claim 1 wherein the power converter circuit includes a control circuit, the control circuit configured to adjust a duration of the given time period of the plurality of time periods based on a condition of a given local power supply node of the plurality of local power supply nodes, and wherein the condition includes that a voltage level of the given local power supply node fails to satisfy a first threshold value or that a current drawn from the given local power supply node fails to satisfy a second threshold value.

3 . The apparatus of claim 2 , wherein:
the power converter circuit further includes a first transistor coupled between an input power supply node and a switch node, a second transistor coupled between the switch node and a ground supply node, and an inductor coupled between the switch node and the converter node; the first transistor is configured to be controlled by a first signal generated by the control circuit; and the second transistor is configured to be controlled by a second signal generated by the control circuit.

4 . The apparatus of claim 3 , wherein the control circuit is configured to generate the first signal and the second signal, and wherein, to generate the first signal and the second signal, the control circuit is configured to compare a voltage level of the given local power supply node to a reference voltage of a plurality of reference voltages.

5 . The apparatus of claim 3 , wherein, in response to receipt of the first signal, the first transistor is configured to couple the switch node to the input power supply node to magnetize the inductor.

6 . The apparatus of claim 3 , wherein, in response to receipt of the second signal, the second transistor is configured to couple the switch node to the ground supply node to de-magnetize the inductor.

7 . The apparatus of claim 2 , wherein the control circuit is further configured to generate an activation signal and the bypass signal, and wherein, in response to receipt of the bypass signal, the given switch device is configured to couple the given local power supply node to the converter node.

8 . The apparatus of claim 1 , wherein the given voltage regulator circuit includes a transistor coupled between the converter node and a given local power supply node, and wherein a conductance between the converter node and the given local power supply node is adjustable based on a signal provided to the transistor.

9 . The apparatus of claim 1 , wherein:
the given voltage regulator circuit further includes a comparator circuit configured to compare a reference voltage to a voltage level of a given local power supply node; and the comparator circuit is configured to generate a control signal based on a comparison of the reference voltage to the voltage level of the given local power supply node.

10 . A method, comprising:
generating, by a power converter circuit, a plurality of voltage levels on a converter node during a plurality of time periods having adjustable durations; generating, by a plurality of voltage regulator circuits coupled to the converter node, respective voltage levels on a plurality of local power supply nodes based on a voltage level of the converter node; and bypassing, by a given switch device of a plurality of switch devices coupled between the converter node and corresponding local power supply node of the plurality of local power supply nodes, a given voltage regulator circuit during a given time period of the plurality of time periods in response to receiving, by the given switch device, a bypass signal generated by the power converter circuit.

11 . The method of claim 10 , wherein the method further comprises adjusting, by a control circuit of the power converter circuit, a duration of the given time period of the plurality of time periods based on a condition of a given local power supply node of the plurality of local power supply nodes, and wherein the condition includes that a voltage level of the given local power supply node fails to satisfy a first threshold value or that a current drawn from the given local power supply node fails to satisfy a second threshold value.

12 . The method of claim 11 , further comprising:
magnetizing an inductor of the power converter circuit, wherein magnetizing the inductor includes coupling, by a first transistor of the power converter circuit, a switch node to an input power supply node.

13 . The method of claim 12 , further comprising:
controlling the first transistor coupled between the input power supply node and the switch node, wherein controlling the first transistor includes providing a first signal to the first transistor, the first signal generated by the control circuit.

14 . The method of claim 10 , wherein the method further comprises:
adjusting, by a control circuit of the power converter circuit, a duration of the given time period of the plurality of time periods based on a condition of a given local power supply node of the plurality of local power supply nodes; and de-magnetizing an inductor of the power converter circuit, wherein de-magnetizing the inductor includes coupling, by a second transistor of the power converter circuit, a switch node to a ground supply node.

15 . The method of claim 14 , further comprising:
controlling the second transistor coupled between the switch node and the ground supply node, wherein controlling the second transistor includes providing a second signal to the second transistor, the second signal generated by the control circuit.

16 . An apparatus, comprising:
a processor circuit; a memory circuit coupled to the processor circuit by a power supply node; an input/output (I/O) circuit coupled to the memory circuit and to the processor circuit by the power supply node; and a power management circuit coupled to the processor circuit, the memory circuit, and the I/O circuit via the power supply node, wherein the power management circuit includes:
a power converter circuit configured to generate a plurality of voltage levels on a converter node during a plurality of time periods having adjustable durations;
a plurality of voltage regulator circuits coupled to the converter node and configured to generate respective voltage levels on a plurality of local power supply nodes based on a voltage level of the converter node; and
a plurality of switch devices coupled between the converter node and corresponding local power supply nodes of the plurality of local power supply nodes, wherein a given switch device of the plurality of switch devices is configured to bypass a given voltage regulator circuit of the plurality of voltage regulator c

Assignees

• Apple Inc

Inventors

• Zyuban Victor
• Fletcher Jay B
• Zhou Hao

Classifications

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title