Systems and methods for data transfer for computational storage devices

Patent metadata

Field	Value
Publication number	US-2025138742-A1
Application number	US-202519011582-A
Country	US
Kind code	A1
Filing date	Jan 6, 2025
Priority date	Jan 27, 2021
Publication date	May 1, 2025
Grant date	—

Abstract

Provided are systems, methods, and apparatuses for managing memory. The method can include: establishing a connection via an interface, between a host device and a storage device; and transferring data, via the interface, between first memory associated with the host device and second memory associated with the storage device by performing a data operation on the second memory by an application executed by the host, where the storage device includes a processing element that accelerates the data operation by performing at least one offload function on the data operation.

First claim

1 . A method to manage memory, the method comprising:
establishing a connection, via an interface, between a host device and a storage device; and transferring a data, via the interface, from a first memory associated with the host device to a second memory associated with the storage device by executing a data operation on the data in the second memory by an application executing on the host device, wherein the storage device includes a processing element to execute an offload function to accelerator the data operation.

2 . The method of claim 1 , wherein:
the interface includes an application programming interface (API); and the host device is configured to allocate the second memory using at least one command associated with the API.

3 . The method of claim 2 , wherein the host device is configured to allocate the second memory using at least one of a fine-grained allocation scheme or a coarse-grained allocation scheme.

4 . The method of claim 1 , wherein:
the method further comprises addressing the second memory; and transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes transferring the data from the first memory associated with the host device to the second memory associated with the storage device based at least in part on the addressing of the second memory.

5 . The method of claim 1 , wherein:
the second memory includes a secure address space configured to protect the data of a first tenant from access by a second tenant; and the method further comprises performing, by the host device, one or more multitenant operations based at least in part on the secure address space.

6 . The method of claim 1 , wherein:
the storage device includes a non-volatile memory express (NVMe)-enabled storage device; and the data operation is executed using a scatter gather list (SGL).

7 . The method of claim 1 , wherein transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes transferring the data a persistent memory associated with the storage device to the second memory associated with the storage device.

8 . The method of claim 1 , wherein transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes providing information, by the host device to the storage device, regarding a layout of the first memory.

9 . The method of claim 1 , wherein transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes providing information, by the storage device to the host device, regarding a layout of the storage memory for read and write operations.

10 . The method of claim 1 , wherein establishing the connection, via the interface, between the host device and the storage device includes executing, by the host device, a discovery and setup process of the storage device.

11 . The method of claim 1 , wherein the data operation accesses a result of the offload function from the second memory associated with the storage device.

12 . A non-transitory computer-readable medium storing computer-executable instructions for managing memory which, when executed by a processor, cause the processor to perform operations comprising:
establishing a connection, via an interface, between a host device and a storage device; and transferring a data, via the interface, from a first memory associated with the host device to a second memory associated with the storage device by executing a data operation on the data in the second memory by an application executing on the host device, wherein the storage device includes a processing element to execute an offload function to accelerator the data operation.

13 . The non-transitory computer-readable medium of claim 12 , wherein:
the method further comprises addressing the second memory; and transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes transferring the data from the first memory associated with the host device to the second memory associated with the storage device based at least in part on the addressing of the second memory.

14 . The non-transitory computer-readable medium of claim 12 , wherein:
the second memory includes a secure address space configured to protect the data of a first tenant from access by a second tenant; and the method further comprises performing, by the host device, one or more multitenant operations based at least in part on the secure address space.

15 . The non-transitory computer-readable medium of claim 12 , wherein:
the storage device includes a non-volatile memory express (NVMe)-enabled storage device; and the data operation is executed using a scatter gather list (SGL).

16 . The non-transitory computer-readable medium of claim 12 , wherein transferring the data from the first memory associated with the host device to the second memory associated with the storage device includes transferring the data a persistent memory associated with the storage device to the second memory associated with the storage device.

17 . A system for managing memory, comprising:
a host device including a first memory and an application; and a storage device including a device manager, a storage media, a processing element, and a second memory; wherein the system stores computer-executable instructions which, when executed by a processor, cause the processor to perform operations comprising:
establishing a connection, via an interface, between a host device and a storage device; and
transferring a data, via the interface, from a first memory associated with the host device to a second memory associated with the storage device by executing a data operation on the data in the second memory by an application executing on the host device,
wherein the storage device includes a processing element to execute an offload function to accelerator the data operation.

18 . The system of claim 17 , wherein:
the interface includes an application programming interface (API); and the host device is configured to allocates the second memory using at least one command associated with the API.

19 . The system of claim 17 , wherein the storage device is configured to transfer a second data, via the interface, between a third memory associated with the storage device and a fourth memory associated with the storage device.

20 . The system of claim 17 , wherein the storage device is configured to transfer a second data, via the interface, between at least a third memory associated with the storage device and a fourth memory associated with the host device.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Pinto Oscar P
• Kachare Ramdas P

Classifications

• G06F3/0644 Primary

  Management of space entities, e.g. partitions, extents, pools · CPC title

• G06F3/0622

  in relation to access · CPC title

• G06F3/067

  Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

• G06F9/544

  Buffers; Shared memory; Pipes · CPC title

• G06F2209/509

  Offload · CPC title