Semiconductor device
US-2024421048-A1 · Dec 19, 2024 · US
Semiconductor device
US2025132230A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025132230-A1 |
| Application number | US-202118692588-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 22, 2021 |
| Priority date | Nov 22, 2021 |
| Publication date | Apr 24, 2025 |
| Grant date | — |
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- Title
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- Abstract
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- First independent claim
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- CPC / IPC classifications
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Abstract
Official abstract text for this publication.
The visibility of the inserted portions of the signal terminals after the insertion of the signal terminals into the lead frame is improved. A semiconductor device includes an insulating substrate, a semiconductor element, a main terminal frame, a signal terminal frame connected to the semiconductor element via a wire, and a sealing resin that seals a portion of the insulating substrate, the semiconductor element, a portion of the main terminal frame, and a portion of the signal terminal frame, in which the signal terminal frame includes a receiving portion in a portion exposed from the sealing resin, and the semiconductor device further comprising at least one signal terminal pin connected to the signal terminal frame via the receiving portion of the signal terminal frame so as to extend in a direction intersecting the upper surface of the insulating substrate.
First claim
Opening claim text (preview).
1 . A semiconductor device comprising: an insulating substrate having a circuit pattern on an upper surface thereof; a semiconductor element provided on the upper surface of the insulating substrate via the circuit pattern; a main terminal frame connected to the semiconductor element via a wire; a signal terminal frame connected to the semiconductor element via a wire; and a sealing resin that seals a portion of the insulating substrate, the semiconductor element, a portion of the main terminal frame, and a portion of the signal terminal frame, wherein the signal terminal frame includes a receiving portion in a portion exposed from the sealing resin, and the semiconductor device further comprising at least one signal terminal pin connected to the signal terminal frame via the receiving portion of the signal terminal frame so as to extend in a direction intersecting the upper surface of the insulating substrate. 2 . The semiconductor device according to claim 1 , wherein the receiving portion is a hole formed in the signal terminal frame, and, with being inserted in the hole, the signal terminal pin is connected to the signal terminal frame using a conductive bonding material. 3 . The semiconductor device according to claim 1 , wherein the receiving portion is a hole formed in the signal terminal frame, the signal terminal pin further includes a press-fit structure at a position corresponding to the hole, and the signal terminal pin is connected to the signal terminal frame via the press-fit structure. 4 . The semiconductor device according to claim 3 , wherein the press-fit structure has a shape in which a width thereof increases as it extends in an inserting direction. 5 . The semiconductor device according to claim 1 , wherein the receiving portion is a hole formed in the signal terminal frame, and the hole is formed to have a periphery concave. 6 . The semiconductor device according to claim 1 , further comprising a contact structure provided in which the signal terminal pin contacts a portion that does not correspond to the receiving portion in a portion of the signal terminal frame exposed from the sealing resin. 7 . The semiconductor device according to claim 1 , wherein the sealing resin covers a lower surface of the signal terminal frame at the periphery of the receiving portion. 8 . The semiconductor device according to claim 7 , wherein the sealing resin further includes a positioning portion for positioning the signal terminal pin in the periphery of the receiving portion. 9 . The semiconductor device according to claim 1 , wherein the signal terminal pin further includes a positioning pin for positioning, and the signal terminal frame further includes a positioning hole into which the positioning pin is inserted. 10 . The semiconductor device according to claim 1 , wherein the signal terminal pin further includes a caulking structure for sandwiching the receiving portion of the signal terminal frame. 11 . The semiconductor device according to claim 1 , further comprising: a plurality of the signal terminal pins; and a fixing member that fixes an arrangement between the plurality of signal terminal pins.
Assignees
Inventors
Classifications
between a chip and a laterally-adjacent insulating package substrate, interpose or RDL · CPC title
the semiconductor body being completely enclosed · CPC title
for connecting multiple chips together · CPC title
Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title
Package configurations · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US2025132230A1 cover?
- The visibility of the inserted portions of the signal terminals after the insertion of the signal terminals into the lead frame is improved. A semiconductor device includes an insulating substrate, a semiconductor element, a main terminal frame, a signal terminal frame connected to the semiconductor element via a wire, and a sealing resin that seals a portion of the insulating substrate, the se…
- Who is the assignee on this patent?
- Mitsubishi Electric Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W72/50. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Apr 24 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).