Display device

US2025104635A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025104635-A1
Application numberUS-202418893421-A
CountryUS
Kind codeA1
Filing dateSep 23, 2024
Priority dateSep 27, 2023
Publication dateMar 27, 2025
Grant date

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a substrate including first to N-th pixel circuit areas, where N is a natural number greater than 1 disposed in a first direction, an initialization voltage line disposed on the substrate, the initialization voltage line extending in a second direction, intersecting the first direction, and overlapping one of the first to N-th pixel circuit areas, a driving voltage line disposed on the substrate, the driving voltage line extending in the second direction, and adjacent to the initialization voltage line in the first direction, and a data line disposed on the substrate, the data line extending in the second direction, and spaced apart from the initialization voltage line in the first direction with the driving voltage line disposed between the data line and the initialization voltage line.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a substrate including first to N-th pixel circuit areas disposed in a first direction, where Nis a natural number greater than 1; an initialization voltage line disposed on the substrate, the initialization voltage line extending in a second direction intersecting the first direction, and overlapping one of the first to N-th pixel circuit areas; a driving voltage line disposed on the substrate, the driving voltage line extending in the second direction, and adjacent to the initialization voltage line in the first direction; and a data line disposed on the substrate, the data line extending in the second direction, and spaced apart from the initialization voltage line in the first direction with the driving voltage line disposed between the data line and the initialization voltage line. 2 . The display device of claim 1 , further comprising: first to N-th pixel circuits disposed in the first to N-th pixel circuit areas, respectively, wherein each of the first to N-th pixel circuits includes: a driving transistor which provides a driving current; a first switching transistor which provides a data voltage to the driving transistor; and a second switching transistor which provides an initialization voltage to the driving transistor. 3 . The display device of claim 2 , wherein a gate electrode of the first switching transistor and a gate electrode of the second switching transistor receive a same signal. 4 . The display device of claim 2 , wherein the driving voltage line overlaps each of the first to N-th pixel circuit areas, and the driving voltage line overlapping the (N-1)-th pixel circuit area provides a driving voltage to the driving transistor included in the N-th pixel circuit. 5 . The display device of claim 1 , further comprising: a common voltage line disposed on the substrate, the common voltage line extending in the second direction, wherein the common voltage line, the driving voltage line, and the data line are disposed in the first direction in an order of the driving voltage line, the data line, and the common voltage line. 6 . The display device of claim 5 , wherein the driving voltage line and the common voltage line are disposed in a same layer. 7 . The display device of claim 5 , wherein the driving voltage line and the common voltage line are disposed in different layers. 8 . The display device of claim 5 , further comprising: an active pattern disposed on the substrate and overlapping the first to N-th pixel circuit areas; a first conductive layer disposed on the active pattern and including a gate electrode; and a second conductive layer disposed on the first conductive layer. 9 . The display device of claim 8 , wherein the second conductive layer includes the driving voltage line and the common voltage line. 10 . The display device of claim 8 , further comprising: a third conductive layer disposed on the second conductive layer, wherein the second conductive layer includes the driving voltage line, and the third conductive layer includes the common voltage line. 11 . The display device of claim 8 , wherein the active pattern includes an oxide semiconductor. 12 . A display device comprising: a substrate including first to N-th pixel circuit areas disposed in a first direction, where N is a natural number greater than 1; an initialization voltage line disposed on the substrate, the initialization voltage line extending in a second direction intersecting the first direction, and overlapping one of the first to N-th pixel circuit areas; a common voltage line disposed on the substrate, the common voltage line extending in the second direction, and adjacent to the initialization voltage line in the first direction, and a data line disposed on the substrate, the data line extending in the second direction, and spaced apart from the initialization voltage line in the first direction with the common voltage line disposed between the data line and the initialization voltage line. 13 . The display device of claim 12 , further comprising: first to N-th pixel circuits disposed in the first to N-th pixel circuit areas, respectively, wherein each of the first to N-th pixel circuits includes: a driving transistor which provides a driving current; a first switching transistor which provides a data voltage to the driving transistor; and a second switching transistor which provides an initialization voltage to the driving transistor. 14 . The display device of claim 13 , wherein a gate electrode of the first switching transistor and a gate electrode of the second switching transistor receive a same signal. 15 . The display device of claim 13 , further comprising: a driving voltage line disposed on the substrate and extending in the second direction, wherein the driving voltage line, the common voltage line, and the data line are disposed in the first direction in an order of the common voltage line, the data line, and the driving voltage line. 16 . The display device of claim 15 , wherein the driving voltage line overlaps each of the first to N-th pixel circuit areas, and the driving voltage line overlapping the N-th pixel circuit area provides a driving voltage to the driving transistor included in the N-th pixel circuit. 17 . The display device of claim 15 , wherein the driving voltage line and the common voltage line are disposed in a same layer. 18 . The display device of claim 15 , further comprising: an active pattern disposed on the substrate and overlapping the first to N-th pixel circuit areas; a first conductive layer disposed on the active pattern and including a gate electrode; and a second conductive layer disposed on the first conductive layer. 19 . The display device of claim 18 , wherein the second conductive layer includes the driving voltage line and the common voltage line.

Assignees

Inventors

Classifications

  • Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display · CPC title

  • Several active elements per pixel in active matrix panels · CPC title

  • Layout of electrodes and connections · CPC title

  • Details of drivers for data electrodes · CPC title

  • G09G3/3233Primary

    with pixel circuitry controlling the current through the light-emitting element · CPC title

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What does patent US2025104635A1 cover?
A display device includes a substrate including first to N-th pixel circuit areas, where N is a natural number greater than 1 disposed in a first direction, an initialization voltage line disposed on the substrate, the initialization voltage line extending in a second direction, intersecting the first direction, and overlapping one of the first to N-th pixel circuit areas, a driving voltage lin…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Mar 27 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).