Semiconductor devices and methods of manufacturing
US-12166025-B2 · Dec 10, 2024 · US
US2025087610A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025087610-A1 |
| Application number | US-202418825283-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 5, 2024 |
| Priority date | Sep 8, 2023 |
| Publication date | Mar 13, 2025 |
| Grant date | — |
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An electronic chip including a support and connection pillars, each connection pillar including a trunk including an end portion and an intermediate portion coupling the end portion to the support, and including a collar at the junction between the end portion and the intermediate portion.
Opening claim text (preview).
1 . A method of manufacturing an electronic chip comprising a support and connection pillars, each connection pillar comprising a trunk comprising an end portion and an intermediate portion coupling the end portion to the support and comprising a collar at the junction between the end portion and the intermediate portion, the method comprising forming a first mask of photosensitive resin comprising, for each connection pillar, a first through opening, depositing the material making up the trunk in the first through openings, forming a second mask of photosensitive resin comprising a second through opening in the extension of each first through opening, and depositing the material making up the trunk in the second through openings. 2 . The method of manufacturing according to claim 1 , wherein the height of the end portion is between 10 μm and 100 μm. 3 . The method of manufacturing according to claim 1 , wherein the height of the intermediate portion is between 10 μm and 100 μm. 4 . The method of manufacturing according to claim 1 , wherein the difference between the maximum lateral dimension of the collar and the minimum lateral dimension of the end portion is between 1 μm and 7 μm. 5 . The method of manufacturing according to claim 1 , wherein the end portion comprises an end face on the side opposite the intermediate portion. 6 . The method of manufacturing according to claim 5 , wherein the end portion has a flared shape on the side of the end face. 7 . The method of manufacturing according to claim 5 , wherein the connection pillar comprises a finishing layer covering the end face. 8 . The method of manufacturing according to claim 1 , wherein the trunk is made of copper. 9 . A method of assembling an electronic chip manufactured according to the method of manufacturing according to claim 1 to another electronic chip or to a package, comprising penetrating the connection pillars into a layer of sinter paste at least up to the collar of each connection pillar, removing the connection pillars from the layer of sinter paste, a block of sinter paste remaining attached to each connection pillar at least over the height of the end portion, preferably over a height equal to 50 μm, depositing the electronic chip on the other electronic chip or on the package, and heating to obtain sintering of the blocks of sinter paste. 10 . The method of assembling according to claim 9 , wherein, during heating to obtain sintering of the blocks of sinter paste, there is no pressure exerted on the electronic chip. 11 . The method of assembling according to claim 9 , wherein the amount of paste to be sintered after bonding, between each connection pillar and the other chip or package, is greater than 4 μm, preferably between 7 μm and 15 μm.
by using masks · CPC title
forming coatings · CPC title
of bump connectors · CPC title
Dispositions, e.g. layouts · CPC title
characterised by the structure of the outermost layers, e.g. multilayered coatings · CPC title
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