Light-emitting substrate, display panel and display device

Patent metadata

Field	Value
Publication number	US-2025081804-A1
Application number	US-202218553771-A
Country	US
Kind code	A1
Filing date	Dec 1, 2022
Priority date	Dec 1, 2022
Publication date	Mar 6, 2025
Grant date	—

Abstract

A light-emitting substrate, a display panel and a display device are disclosed. The light-emitting substrate includes: a base substrate; a first power line disposed on the base substrate; an auxiliary electrode pattern disposed on a side of the first power supply line away from the base substrate and electrically connected with the first power supply line; an organic material layer disposed on a surface of the auxiliary electrode pattern and having a first via hole exposing part of a surface of the auxiliary electrode pattern at the bottom, wherein the part of the surface of the auxiliary electrode pattern exposed at the bottom of the first via hole is a non-planar surface; and a first electrode layer disposed on a side of the organic material layer away from the base substrate and electrically connected with the auxiliary electrode pattern through the first via hole.

First claim

1 . A light-emitting substrate, comprising:
a base substrate; a first power supply line disposed on the base substrate; an auxiliary electrode pattern disposed on a side of the first power supply line away from the base substrate and electrically connected with the first power supply line; an organic material layer disposed on a surface of a side of the auxiliary electrode pattern away from the base substrate and having a first via hole penetrating through the organic material layer, a bottom of the first via hole exposing part of a surface of the auxiliary electrode pattern, wherein the part of the surface of the auxiliary electrode pattern exposed at the bottom of the first via hole is a non-planar surface; and a first electrode layer disposed on a side of the organic material layer away from the base substrate and electrically connected with the auxiliary electrode pattern through the first via hole.

2 . The light-emitting substrate according to claim 1 , wherein the auxiliary electrode pattern comprises a first convex surface protruding in a first direction, and part of the first convex surface is exposed at the bottom of the first via hole, wherein the first direction is a direction perpendicular to a plane where the base substrate is located and facing a light-exiting side of the light-emitting substrate.

3 . The light-emitting substrate according to claim 2 , wherein the first convex surface is a truncated spherical surface.

4 . The light-emitting substrate according to claim 2 , further comprising:
a first conductive pattern disposed between the auxiliary electrode pattern and the first power supply line and electrically connected with the first power supply line through a via hole; and a planarization layer disposed between the first conductive pattern and the first electrode layer and having a groove in a surface of a side of the planarization layer away from the base substrate, wherein the auxiliary electrode pattern is at least partially disposed in the groove and is electrically connected with the first conductive pattern through a second via hole penetrating through the planarization layer.

5 . The light-emitting substrate according to claim 4 , wherein a bottom of the groove comprises a second convex surface protruding in the first direction, and an orthographic projection of the second convex surface on the base substrate at least partially overlaps with an orthographic projection of the first convex surface on the base substrate.

6 . The light-emitting substrate according to claim 5 , wherein the second convex surface is conformal to the first convex surface.

7 . The light-emitting substrate according to claim 5 , wherein in the first direction, a distance from a top of the second convex surface to a plane where the lowest position of a groove bottom of the groove is located is defined as H1, a height from a groove opening plane of the groove to the plane where the lowest position of the groove bottom of the groove is located is defined as H2, a thickness of the auxiliary electrode pattern at a position corresponding to a top of the second convex surface is defined as T, and H1, H2 and T satisfy: H2<H1+T≤2*H2.

8 . The light-emitting substrate according to claim 7 , wherein H1, H2 and T satisfy: H2<H1+T≤1.5*H2.

9 . The light-emitting substrate according to claim 5 , wherein in a second direction, the maximum length of the second convex surface is defined as L1, the minimum distance between the second convex surface and the second via hole is defined as L2, and L1 and L2 satisfy: 0.5*L1≤L2≤L1, wherein the second direction is a direction parallel to the plane where the base substrate is located and pointing to a center of the second via hole from a center of the second convex surface.

10 . The light-emitting substrate according to claim 5 , wherein in a second direction, the maximum length of the second convex surface is defined as L1, the maximum length of the first via hole is defined as L3, and L1 and L3 satisfy: 0.25*L1≤L3≤L1, wherein the second direction is a direction parallel to the plane where the base substrate is located and pointing from a center of the second convex surface to a center of the second via hole.

11 . The light-emitting substrate according to claim 5 , wherein a slope angle of the second convex surface at a bottom edge position is defined as θ, and θ satisfies: 20°≤θ≤45°.

12 . The light-emitting substrate according to claim 4 , further comprising:
a pixel definition layer located on a side of the planarization layer away from the base substrate and having a first opening, wherein at least part of the organic material layer is located in the first opening, the first electrode layer is disposed on a surface of a side of the pixel definition layer away from the base substrate, and at least covers the organic material layer and a side wall of the first opening, a slope angle of the pixel definition layer at a bottom edge position of the first opening is defined as α, and α satisfies: 20°≤α<30°.

13 . The light-emitting substrate according to claim 12 , further comprising:
a pixel unit comprising a thin film transistor and a light-emitting device, wherein the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode layer, the thin film transistor is located between the base substrate and the planarization layer, the first electrode is located on a side of the planarization layer away from the base substrate, and is electrically connected with the thin film transistor through a third via hole penetrating through the planarization layer, at least part of the light-emitting layer is located on a surface of a side of the first electrode away from the base substrate, the second electrode layer is located on a side of the light-emitting layer away from the base substrate, the pixel definition layer also has a second opening, at least part of the light-emitting layer is located in the second opening, and the second electrode layer is disposed on the surface of a side of the pixel definition layer away from the base substrate and at least covers the light-emitting layer and a side wall of the second opening.

14 . The light-emitting substrate according to claim 13 , wherein a slope angle of the pixel definition layer at a bottom edge position of the second opening is defined as β, and α and β satisfy: α<β.

15 . The light-emitting substrate according to claim 13 , wherein the first electrode and the auxiliary electrode pattern are located in a same layer and made of a same material, the light-emitting layer and the organic material layer are located in a same layer and made of a same material, and the second electrode layer and the first electrode layer are located in a same layer and made of a same material.

16 . The light-emitting substrate according to claim 13 , further comprising:
a first insulating layer, a second insulating layer, a third insulating layer and a fourth insulating layer which are sequentially laminated on the base substrate; a second power supply line disposed on the base substrate; and a second conductive pattern disposed on a side of the third insulating layer away from the base substrate, and electrically connected with the second power supply line through a via hole penetrating through the third insulating layer, the second insulating layer and part of the first insulating layer, wherein the first insulating layer covers the first power supply line and the second power supply line, the fourth insulating layer covers the first conductive pattern and the second conductive pattern, and the s

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Li Langtao
• Zheng Kening
• Xu Jian
• Hu Zhen
• Wu Han
• Bai Jinglu

Classifications

• H10K59/124

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/80522

  combined with auxiliary electrodes · CPC title

• H10K59/80516

  combined with auxiliary electrodes, e.g. ITO layer combined with metal lines · CPC title

• H10K59/80515 Primary

  characterised by their shape · CPC title