Biasing and readout methods for high-speed resistive gate sensor

Patent metadata

Field	Value
Publication number	US-2025072139-A1
Application number	US-202418809802-A
Country	US
Kind code	A1
Filing date	Aug 20, 2024
Priority date	Aug 23, 2023
Publication date	Feb 27, 2025
Grant date	—

Abstract

Photon or electron detectors may include polycrystalline silicon resistive gates with voltage gradients applied to reduce lag and improve operating speeds. The polycrystalline silicon resistive gates may be doped polycrystalline silicon which is heavily doped with donor atoms or acceptor atoms and ion-implanted with an electrically inactive species. The electrically inactive species may be implanted in a pattern to form multiple ion-implanted regions with different resistivities. The ion-implanted regions are formed in select patterns to control the resistivity of the polycrystalline silicon resistive gates and to modify the lateral electric field across the differentially-biased polycrystalline silicon resistive gate. The X-ray detectors may also include a circuit element with a current-mode differential connection to improve clock feedthrough and power dissipation characteristics.

First claim

What is claimed:

1 . A polycrystalline silicon resistive gate comprising:
heavily doped polycrystalline silicon, wherein the heavily doped polycrystalline silicon is one of an n-type semiconductor or a p-type semiconductor, wherein the heavily doped polycrystalline silicon is heavily doped with a plurality of atoms, wherein the plurality of atoms comprise one of donor atoms or acceptor atoms, wherein the plurality of atoms saturate a plurality of carrier traps of the heavily doped polycrystalline silicon; wherein the heavily doped polycrystalline silicon is ion-implanted with an electrically inactive species, wherein the electrically inactive species comprises one of carbon or nitrogen, wherein the electrically inactive species define a first ion-implanted region and a second ion-implanted region, wherein the first ion-implanted region is implanted with a higher concentration of the electrically inactive species than the second ion-implanted region, wherein a first resistivity of the first ion-implanted region is higher than a second resistivity of the second ion-implanted region.

2 . The polycrystalline silicon resistive gate of claim 1 , wherein the polycrystalline silicon resistive gate is a thin film, wherein a thickness of the polycrystalline silicon resistive gate is between 50 and 1000 nm.

3 . The polycrystalline silicon resistive gate of claim 1 , wherein a width and a length of the polycrystalline silicon resistive gate is between 100 and 1000 μm.

4 . The polycrystalline silicon resistive gate of claim 1 , wherein a concentration of the plurality of atoms is between 30 and 200 times an amount necessary to saturate the plurality of carrier traps of the heavily doped polycrystalline silicon.

5 . The polycrystalline silicon resistive gate of claim 1 , wherein the first resistivity of the first ion-implanted region is between four and ten times larger than the second resistivity of the second ion-implanted region.

6 . The polycrystalline silicon resistive gate of claim 1 , wherein the polycrystalline silicon resistive gate is a dual-resistivity resistive gate.

7 . The polycrystalline silicon resistive gate of claim 1 , wherein the polycrystalline silicon resistive gate is a multi-resistivity resistive gate, wherein the polycrystalline silicon resistive gate comprises three or more ion-implanted regions with different resistivities.

8 . The polycrystalline silicon resistive gate of claim 1 , wherein the second ion-implanted region is not continuous, wherein at least one portion of the second ion-implanted region are separated from at least one additional portion of the second ion-implanted region by the first ion-implanted region.

9 . The polycrystalline silicon resistive gate of claim 1 , wherein the second ion-implanted region is a diagonal-striped ion-implanted region, wherein the diagonal-striped ion-implanted region comprises a first pair of diagonal stripes and a second pair of diagonal stripes, wherein the first pair of diagonal stripes are colinear, wherein the second pair of diagonal stripes are colinear, wherein the second pair of diagonal stripes are orthogonal to the first pair of diagonal stripes.

10 . The polycrystalline silicon resistive gate of claim 9 , wherein the first pair of diagonal stripes and the second pair of diagonal stripes are aligned to a center of the polycrystalline silicon resistive gate.

11 . The polycrystalline silicon resistive gate of claim 10 , wherein the first pair of diagonal stripes and the second pair of diagonal stripes are aligned to corners of the polycrystalline silicon resistive gate.

12 . The polycrystalline silicon resistive gate of claim 10 , wherein the first pair of diagonal stripes and the second pair of diagonal stripes do not intersect at the center, wherein the first ion-implanted region is disposed between the first pair of diagonal stripes and the second pair of diagonal stripes.

13 . The polycrystalline silicon resistive gate of claim 9 , wherein a width of the first pair of diagonal stripes and the second pair of diagonal stripes does not change along a length of the first pair of diagonal stripes and the second pair of diagonal stripes.

14 . The polycrystalline silicon resistive gate of claim 1 , wherein the second ion-implanted region is a polygonal-shaped ion-implanted region, wherein the polygonal-shaped ion-implanted region is centered on the polycrystalline silicon resistive gate.

15 . The polycrystalline silicon resistive gate of claim 14 , wherein the polygonal-shaped ion-implanted region includes a reflective symmetry about four axes which are each offset by 45° and are orthogonal to a center axis, wherein the polygonal-shaped ion-implanted region includes a rotational symmetry of 90°.

16 . The polycrystalline silicon resistive gate of claim 15 , wherein the polygonal-shaped ion-implanted region is an octagon.

17 . An X-ray detector comprising:
a gate oxide layer; and a plurality of polycrystalline silicon resistive gates, wherein the plurality of polycrystalline silicon resistive gates are formed in the gate oxide layer, wherein the plurality of polycrystalline silicon resistive gates comprise:
heavily doped polycrystalline silicon, wherein the heavily doped polycrystalline silicon is one of an n-type semiconductor or a p-type semiconductor, wherein the heavily doped polycrystalline silicon is heavily doped with a plurality of atoms, wherein the plurality of atoms comprise one of donor atoms or acceptor atoms, wherein the plurality of atoms saturate a plurality of carrier traps of the heavily doped polycrystalline silicon;
wherein the heavily doped polycrystalline silicon is ion-implanted with an electrically inactive species, wherein the electrically inactive species comprises one of carbon or nitrogen, wherein the electrically inactive species define a first ion-implanted region and a second ion-implanted region, wherein the first ion-implanted region is implanted with a higher concentration of the electrically inactive species than the second ion-implanted region, wherein a first resistivity of the first ion-implanted region is higher than a second resistivity of the second ion-implanted region;
wherein the X-ray detector is configured to generate an image data signal in response to detecting at least one X-ray photon.

18 . The X-ray detector of claim 17 , comprising a plurality of electrical connections, wherein the plurality of electrical connections are made to the plurality of polycrystalline silicon resistive gates, wherein the plurality of electrical connections comprise a plurality of source electrical connections and a plurality of drain electrical connections, wherein the plurality of source electrical connections are made around a perimeter of the plurality of polycrystalline silicon resistive gates, wherein the plurality of drain electrical connections are made to a center of the plurality of polycrystalline silicon resistive gates.

19 . The X-ray detector of claim 17 , comprising:
a substrate, wherein the gate oxide layer is formed on a top side surface of the substrate; a boron layer, wherein the boron layer formed on a back side of the substrate; an epitaxial layer, wherein the epitaxial layer is formed on a front side surface of the substrate, wherein the epitaxial layer is a p-type semiconductor; and a buried channel layer, wherein the buried channel layer is formed in the epitaxial layer, wherein the buried channel layer is an n-type semiconductor.

20 . The X-ray detector of claim 17 ,

Assignees

• Kla Corp

Inventors

• Brown David L
• Chern Jehn-Huar Howard
• Trimpl Marcel

Classifications

• H10F39/189

  X-ray, gamma-ray or corpuscular radiation imagers · CPC title

• H10F39/807

  Pixel isolation structures · CPC title

• H10F39/016 Primary

  of thin-film-based image sensors · CPC title

• H10F39/80373 Primary

  characterised by the gate of the transistor · CPC title

• H01L27/14692

  Electricity · mapped topic