Data-to-scan coupling induced error compensation

US2025069541A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025069541-A1
Application numberUS-202418780367-A
CountryUS
Kind codeA1
Filing dateJul 22, 2024
Priority dateAug 23, 2023
Publication dateFeb 27, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic display device designed to a method and device that corrects for distorted luminance and colors due to data-to-scan coupling in a flat-panel display.

First claim

Opening claim text (preview).

What is claimed is: 1 . An electronic apparatus comprising: a display panel; a display driver integrated circuit configured to receive an input signal frame comprising lines of pixels, calculate data voltage transition between the lines of pixels by a line subtractor resulting in a spatial interpolated voltage transition calculation, average a voltage across each column within the lines of pixels resulting in a group average voltage, calculate an aggressor value for a scan phase using the spatial interpolated voltage transition calculation and the group average voltage, compensate per the scan phase by correcting using the aggressor value and an input sub-pixel value by aligning with a corresponding first-in first-out (FIFO) buffer to result in compensation correction voltage values, sum the compensation correction voltage values with the input signal frame to result in a compensated output image frame; and, the display panel further configured to display the compensated output image frame. 2 . The electronic apparatus of claim 1 , wherein the display panel is a light-emitting diode (LED) or liquid crystal display (LCD) display. 3 . The electronic apparatus of claim 1 , wherein the display panel is an organic light-emitting diode (OLED) display. 4 . The electronic apparatus of claim 1 , wherein the display panel is a computer. 5 . The electronic apparatus of claim 1 , wherein the display panel is a tablet computer. 6 . The electronic apparatus of claim 1 , wherein the display panel is a mobile phone. 7 . The electronic apparatus of claim 1 , wherein the display panel is a digital watch or augmented reality headset. 8 . A method of operating an electronic apparatus comprising: receiving an input signal frame comprising lines of pixels; calculating data voltage transition between the lines of pixels by a line subtractor resulting in a spatial interpolated voltage transition calculation; averaging a voltage across each column within the lines of pixels resulting in a group average voltage; calculating an aggressor value for a scan phase using the spatial interpolated voltage transition calculation and the group average voltage; compensating per the scan phase by correcting using the aggressor value and an input sub-pixel value by aligning with a corresponding first-in first-out (FIFO) buffer to result in compensation correction voltage values; summing the compensation correction voltage values with the input signal frame to result in a compensated output image frame; and, displaying the compensated output image frame on a display panel. 9 . The method of claim 8 , wherein the display panel is a light-emitting diode (LED) or liquid crystal display (LCD) display. 10 . The method of claim 8 , wherein the display panel is an organic light-emitting diode (OLED) display. 11 . The method of claim 8 , wherein the display panel is a computer. 12 . The method of claim 8 , wherein the display panel is a tablet computer. 13 . The method of claim 8 , wherein the display panel is a mobile phone. 14 . The method of claim 8 , wherein the display panel is a digital watch or augmented reality headset. 15 . A non-transitory computer readable medium encoded with data and instructions, when executed by electronic apparatus the instructions causing the electronic apparatus to: receive an input signal frame comprising lines of pixels; calculate data voltage transition between the lines of pixels by a line subtractor resulting in a spatial interpolated voltage transition calculation; average a voltage across each column within the lines of pixels resulting in a group average voltage; calculate an aggressor value for a scan phase using the spatial interpolated voltage transition calculation and the group average voltage; compensate per the scan phase by correcting using the aggressor value and an input sub-pixel value by aligning with a corresponding first-in first-out (FIFO) buffer to result in compensation correction voltage values; sum the compensation correction voltage values with the input signal frame to result in a compensated output image frame; and, display the compensated output image frame on a display panel. 16 . The method of claim 15 , wherein the display panel is a light-emitting diode (LED) or liquid crystal display (LCD) display. 17 . The method of claim 15 , wherein the display panel is an organic light-emitting diode (OLED) display. 18 . The method of claim 15 , wherein the display panel is a computer or tablet computer. 19 . The method of claim 15 , wherein the display panel is a mobile phone. 20 . The method of claim 15 , wherein the display panel is a digital watch or augmented reality headset.

Assignees

Inventors

Classifications

  • using an active matrix · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

  • semiconductive, e.g. using light-emitting diodes [LED] · CPC title

  • organic, e.g. using organic light-emitting diodes [OLED] · CPC title

  • using liquid crystals · CPC title

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Frequently asked questions

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What does patent US2025069541A1 cover?
An electronic display device designed to a method and device that corrects for distorted luminance and colors due to data-to-scan coupling in a flat-panel display.
Who is the assignee on this patent?
Apple Inc
What technology area does this patent fall under?
Primary CPC classification G09G3/2096. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Feb 27 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).