Systems and methods for providing an analog output signal using a class-d amplifier

Patent metadata

Field	Value
Publication number	US-2025062728-A1
Application number	US-202418798988-A
Country	US
Kind code	A1
Filing date	Aug 9, 2024
Priority date	Aug 17, 2023
Publication date	Feb 20, 2025
Grant date	—

Abstract

A method for providing an analog output signal includes (a) amplifying a digital first internal signal using a first Class-D amplifier to generate a digital first output signal, (b) filtering the digital first output signal to generate an analog first output signal, (c) providing the analog first output signal to a first load, (d) sensing the analog first output signal to generate an analog first feedback signal, (e) converting the analog first feedback signal to a digital first feedback signal, and (f) configuring the first Class-D amplifier for an impedance of the first load by generating the digital first internal signal at least partially based on the digital first feedback signal.

First claim

What is claimed is:

1 . A method for providing an analog output signal, the method comprising:
amplifying a digital first internal signal using a first Class-D amplifier to generate a digital first output signal; filtering the digital first output signal to generate an analog first output signal; providing the analog first output signal to a first load; sensing the analog first output signal to generate an analog first feedback signal; converting the analog first feedback signal to a digital first feedback signal; and configuring the first Class-D amplifier for an impedance of the first load by generating the digital first internal signal at least partially based on the digital first feedback signal.

2 . The method of claim 1 , wherein sensing the analog first output signal comprises one of sensing a voltage across the first load and sensing a magnitude of current flowing through the first load.

3 . The method of claim 1 , wherein an impedance of the first load may vary independently of a state of the analog first output signal.

4 . The method of claim 1 , wherein the analog first output signal is one of a current signal and a voltage signal.

5 . The method of claim 1 , wherein generating the digital first internal signal at least partially based on the digital first feedback signal comprises generating the digital first internal signal to achieve an average value of the digital first output signal that is a function of an impedance of the first load.

6 . The method of claim 1 , wherein generating the digital first internal signal at least partially based on the digital first feedback signal comprises generating the digital first internal signal at least partially based on a difference between the digital first feedback signal and a first reference value.

7 . The method of claim 1 , further comprising:
using a first analog-to-digital converter (ADC) to convert the analog first feedback signal to the digital first feedback signal; and multiplexing the analog first feedback signal with an analog second feedback signal before an input to the first ADC.

8 . The method of claim 7 , wherein multiplexing the analog first feedback signal with the analog second feedback signal comprises communicatively coupling the analog first feedback signal and the analog second feedback signal to the input of the first ADC at different respective times.

9 . The method of claim 7 , further comprising:
amplifying a digital second internal signal using a second Class-D amplifier to generate a digital second output signal; filtering the digital second output signal to generate an analog second output signal; providing the analog second output signal to a second load; and sensing the analog second output signal to generate the analog second feedback signal.

10 . The method of claim 9 , further comprising using the first ADC to convert the analog second feedback signal to a digital second feedback signal.

11 . The method of claim 10 , further comprising configuring the second Class-D amplifier for an impedance of the second load by generating the digital second internal signal at least partially based on the digital second feedback signal.

12 . A programmable controller, comprising:
a processing system configured to generate a digital first internal signal at least partially according to (a) programming instructions provided to the processing system and (b) a digital first feedback signal; a first Class-D amplifier configured to amplify the digital first internal signal to generate a digital first output signal; a first filter configured to filter the digital first output signal to generate an analog first output signal; first sensing circuitry configured to sense the analog first output signal to generate an analog first feedback signal; and a first analog-to-digital converter (ADC) configured to convert the analog first feedback signal to the digital first feedback signal.

13 . The programmable controller of claim 12 , wherein the processing system is configured to generate the digital first internal signal at least partially according to the digital first feedback signal to configure the first Class-D amplifier for an impedance of a first load receiving the analog first output signal.

14 . The programmable controller of claim 12 , wherein the first filter comprises an inductive-capacitive filter.

15 . The programmable controller of claim 12 , wherein the processing system is further configured to generate the digital first internal signal at least partially according to one or more input signals received by the programmable controller.

16 . The programmable controller of claim 12 , further comprising a multiplexor configured to multiplex the analog first feedback signal with an analog second feedback signal before an input to the first ADC.

17 . The programmable controller of claim 16 , wherein:
the processing system is further configured to generate a digital second internal signal at least partially according to (a) programming instructions provided to the processing system and (b) a digital second feedback signal; and the programmable controller further comprises:
a second Class-D amplifier configured to amplify the digital second internal signal to generate a digital second output signal,
a second filter configured to filter the digital second output signal to generate an analog second output signal, and
second sensing circuitry configured to sense the analog second output signal to generate the analog second feedback signal.

18 . The programmable controller of claim 17 , wherein the first ADC is further configured to convert the analog second feedback signal to the digital second feedback signal.

19 . An electrical environment, comprising:
a programmable controller, including:
a processing system configured to generate a digital first internal signal at least partially according to (a) programming instructions provided to the processing system and (b) a digital first feedback signal,
a first Class-D amplifier configured to amplify the digital first internal signal to generate a digital first output signal,
a first filter configured to filter the digital first output signal to generate an analog first output signal,
first sensing circuitry configured to sense the analog first output signal to generate an analog first feedback signal, and
a first analog-to-digital converter (ADC) configured to convert the analog first feedback signal to the digital first feedback signal; and
a first load powered by the analog first output signal.

20 . The electrical environment of claim 19 , further comprising an electrical cable electrically coupling the first load to the programmable controller.

Assignees

• Maxim Integrated Products

Inventors

• Hematy Arman
• Ashburn Jr Michael A
• Shtargot Leonard
• Hammerschmied Clemens Maria

Classifications

• G05B19/054

  Input/output · CPC title

• H03F1/56

  Modifications of input or output impedances, not otherwise provided for · CPC title

• H03H7/0115

  comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence) · CPC title

• H03F3/20 Primary

  Power amplifiers, e.g. Class B amplifiers, Class C amplifiers (H03F3/26 - H03F3/30 take precedence) · CPC title

• H03M1/1205

  Multiplexed conversion systems · CPC title