Multilayer ceramic capacitor

Patent metadata

Field	Value
Publication number	US-2025062073-A1
Application number	US-202418788202-A
Country	US
Kind code	A1
Filing date	Jul 30, 2024
Priority date	Aug 18, 2023
Publication date	Feb 20, 2025
Grant date	—

Abstract

A multilayer ceramic capacitor includes a multilayer body, first internal electrode layers exposed at a first end surface of the multilayer body, and second internal electrode layers exposed at a second end surface of the multilayer body. The first internal electrode layers are exposed at a first lateral surface and a second lateral surface of the multilayer body. The second internal electrode layers are exposed at the first lateral surface and the second lateral surface of the multilayer body.

First claim

What is claimed is:

1 . A multilayer ceramic capacitor comprising:
a multilayer body including a plurality of dielectric layers laminated in a lamination direction, the multilayer body including a first main surface and a second main surface opposed to each other in the lamination direction, a first lateral surface and a second lateral surface opposed to each other in a width direction orthogonal or substantially orthogonal to the lamination direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the lamination direction and the width direction; first internal electrode layers on the dielectric layers and exposed at the first end surface; second internal electrode layers on the dielectric layers and exposed at the second end surface; a first external electrode including a base electrode layer disposed on the first end surface and a plated layer on the base electrode layer; and a second external electrode including a base electrode layer on the second end surface and a plated layer on the base electrode layer; wherein the first internal electrode layers are exposed at the first lateral surface and the second lateral surface; the second internal electrode layers are exposed at the first lateral surface and the second lateral surface; the first internal electrode layers each include a first region along an end thereof adjacent to the first lateral surface of the multilayer body and a second region along an end thereof adjacent to the second lateral surface of the multilayer body; the first region and the second region include a Ni-Mg-O phase therein; the second internal electrode layers each include a third region along an end thereof adjacent to the first lateral surface of the multilayer body and a fourth region along an end thereof adjacent to the second lateral surface of the multilayer body; and the third region and the fourth region include a Ni-Mg-O phase therein.

2 . The multilayer ceramic capacitor according to claim 1 , wherein
the first region and the second region each have a dimension in the width direction of about 5 μm or more and about 50 μm or less; and the third region and the fourth region each have a dimension in the width direction of about 5 μm or more and about 50 μm or less.

3 . The multilayer ceramic capacitor according to claim 1 , wherein the dielectric layers include at least Mg.

4 . The multilayer ceramic capacitor according to claim 1 , wherein a number of the dielectric layers is 50 or more and 100 or less.

5 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of each of the dielectric layers is about 0.5 μm or more and about 10 μm or less.

6 . The multilayer ceramic capacitor according to claim 1 , wherein each of the dielectric layers includes BaTi 3 ,CaTiO 3 , SrTiO 3 , or CaZrO 3 as a main component.

7 . The multilayer ceramic capacitor according to claim 6 , wherein each of the dielectric layers includes a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound as a subcomponent.

8 . The multilayer ceramic capacitor according to claim 1 , wherein each of the first and second internal electrode layers has a rectangular or substantially rectangular shape.

9 . The multilayer ceramic capacitor according to claim 1 , wherein a number of the first and second internal electrode layers is 50 or more and 1000 or less.

10 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of each of the first and second internal electrode layers is about 0.2 μm or more and about 2.0 μm or less.

11 . The multilayer ceramic capacitor according to claim 1 , wherein a dimension of each of the first and second internal electrode layers is about 5 μm or more and about 50 μm or less.

12 . The multilayer ceramic capacitor according to claim 1 , wherein each of the first and second internal electrode layers includes Ni, Cu, Ag, Pd, or Au, or an alloy including at least one of Ni, Cu, Ag, Pd, or Au.

13 . The multilayer ceramic capacitor according to claim 1 , wherein each of the base electrode layers of the first and second external electrodes includes a baked layer.

14 . The multilayer ceramic capacitor according to claim 13 , wherein the baked layer includes at least one of Cu, Ni, Ag, Pd, a Ag-Pd alloy, or Au.

15 . The multilayer ceramic capacitor according to claim 13 , wherein a thickness of a central portion of baked layer is about 10 μm or more and about 150 μm or less.

16 . The multilayer ceramic capacitor according to claim 1 , wherein each of the base electrode layers of the first and second external electrodes includes a conductive resin layer.

17 . The multilayer ceramic capacitor according to claim 16 , wherein a thickness of the conductive resin layer is about 10 μm or more and about 200 μm or less.

18 . The multilayer ceramic capacitor according to claim 16 , wherein the conductive resin layer includes a thermosetting resin and a metal component.

19 . The multilayer ceramic capacitor according to claim 18 , wherein the thermosetting resin includes epoxy resins, phenol resins, urethane resins, silicone resins, or polyimide resins.

20 . The multilayer ceramic capacitor according to claim 18 , wherein the metal component includes Ag or Cu, or an alloy of Ag or Cu.

Assignees

• Murata Manufacturing Co

Inventors

• Sugita Hiroaki

Classifications

• H01G4/1218

  based on titanium oxides or titanates (H01G4/1245 takes precedence) · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

• H01G4/0085

  Fried electrodes · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/1236

  based on zirconium oxides or zirconates (H01G4/1263 takes precedence) · CPC title