Display substrate and manufacturing method therefor, display panel, and display apparatus

Patent metadata

Field	Value
Publication number	US-2025035997-A1
Application number	US-202118704425-A
Country	US
Kind code	A1
Filing date	Dec 24, 2021
Priority date	Dec 24, 2021
Publication date	Jan 30, 2025
Grant date	—

Abstract

A display substrate includes: a first base substrate; scanning lines a side of the first base substrate, extending in a first direction; and arranged in a second direction data lines at the same side of the first base substrate as the scanning lines and in a different layers from the scanning lines, extending in the second direction and arranged in the first direction; a common electrode layer at a side of the scanning lines and the data lines facing away from the first base substrate; and a first light shielding layer in contact with the common electrode layer, and including first light shielding portions extending in the second direction. The first direction intersects with the second direction. The first light shielding portions are in areas between adjacent sub-pixels in the first direction.

First claim

1 . A display substrate, comprising:
a first base substrate; a plurality of scanning lines at a side of the first base substrate, extending in a first direction and arranged in a second direction; wherein the first direction intersects with the second direction; a plurality of data lines at a side of the first base substrate and in a different layer from the scanning lines, extending in the second direction and arranged in the first direction; wherein the plurality of scanning lines and the plurality of data lines define a plurality of sub-pixels; a common electrode layer at a side of the scanning lines and the data lines facing away from the first base substrate; and a first light shielding layer in contact with the common electrode layer, comprising a plurality of first light shielding portions extending in the second direction; wherein the first light shielding portions are in areas between the sub-pixels adjacent in the first direction.

2 . The display substrate according to claim 1 , wherein orthographic projections of the data lines on the first base substrate are within orthographic projections of the first light shielding portions on the first base substrate.

3 . The display substrate according to claim 1 , wherein the common electrode layer is at a side of the first light shielding portions facing away from the first base substrate; and
orthographic projections of the first light shielding portions on the first base substrate are within an orthographic projection of the common electrode layer on the first base substrate, and the common electrode layer covers lateral surfaces of the first light shielding portions.

4 . The display substrate according to claim 1 , wherein the first light shielding portions are at a side of the common electrode layer facing away from the first base substrate; and an orthographic projection of the common electrode layer on the first base substrate and an orthographic projection of the first light shielding portion on the first base substrate have a substantially overlapping area.

5 . The display substrate according to claim 3 , wherein the common electrode layer comprises: groove groups corresponding to the sub-pixels one by one; and the groove group comprises at least one groove extending in the second direction and penetrating through the common electrode layer; and
the orthographic projections of the first light shielding portions on the first base substrate do not overlap with orthographic projections of the grooves on the first base substrate.

6 . The display substrate according to claim 19 , wherein the groove group comprises a plurality of grooves.

7 . The display substrate according to claim 5 , wherein the groove group comprises only one groove.

8 . The display substrate according to claim 1 , wherein a thickness of the first light shielding layer is greater than or equal to 300 angstroms and less than or equal to 1000 angstroms.

9 . The display substrate according to claim 1 , wherein material of the first light shielding layer comprises molybdenum.

10 . The display substrate according to claim 1 , wherein the first light shielding layer further comprises a plurality of second light shielding portions extending in the first direction; and the second light shielding portions are between the sub-pixels adjacent in the second direction.

11 . The display substrate claim 1 , further comprising:
a pixel electrode layer between the common electrode layer and the data lines; wherein orthographic projections of the first light shielding portions on the first base substrate do not overlap with an orthographic projection of the pixel electrode layer on the first base substrate.

12 . The display substrate according to claim 1 , wherein the data lines are at a side of the scanning lines facing away from the first base substrate; and
the sub-pixel comprises a thin film transistor; a gate electrode of the thin film transistor is arranged in a layer same as the scanning line and is electrically connected to the scanning line; a source electrode of the thin film transistor is arranged in a layer same as the data line and is electrically connected to the data line; and a drain electrode of the thin film transistor is at a side of the source electrode facing away from the first base substrate.

13 . A manufacturing method for a display substrate, comprising:
forming a pattern of a plurality of scanning lines at a side of a first base substrate and forming a pattern of a plurality of data lines at a side of a first base substrate; wherein the plurality of scanning lines extend in a first direction and are arranged in a second direction; the plurality of data lines extend in the second direction and are arranged in the first direction; the first direction intersects with the second direction; the plurality of scanning lines and the plurality of data lines define a plurality of sub-pixels; and forming patterns of a common electrode layer and a first light shielding layer at a side of the plurality of data lines and the plurality of scanning lines facing away from the first base substrate; wherein the first light shielding layer is in contact with the common electrode layer, the first light shielding layer comprises a plurality of first light shielding portions extending in the second direction, and the first light shielding portions are in areas between the sub-pixels adjacent in the first direction.

14 . The method according to claim 13 , wherein said forming the patterns of the common electrode layer and the first light shielding layer at the side of the plurality of data lines and the plurality of scanning lines facing away from the first base substrate, comprises:
forming the common electrode layer at the side of the plurality of data lines and the plurality of scanning lines facing away from the first base substrate; forming the first light shielding layer at a side of the common electrode layer facing away from the first base substrate; and processing the first light shielding layer and the common electrode layer by a patterning process to form a pattern of the first light shielding layer and a pattern of the common electrode layer.

15 . The method according to claim 14 , wherein said processing the first light shielding layer and the common electrode layer by the patterning process to form the pattern of the first light shielding layer and the pattern of the common electrode layer, comprises:
coating photoresist at a side of the first light shielding layer facing away from the common electrode layer, and forming a first pattern by exposure and development processes; forming a second pattern corresponding to the first pattern on the first light shielding layer and the common electrode layer by an etching process; peeling off the photoresist, and annealing the common electrode layer to crystallize the common electrode layer; forming photoresist at a side of the first light shielding layer facing away from the common electrode layer, and forming a third pattern by exposure and development processes; wherein the third pattern covers a part of the first light shielding layer; removing the first light shielding layer that is not covered by the third pattern by an etching process; and removing the photoresist.

16 . The method according to claim 13 , wherein said forming the patterns of the common electrode layer and the first light shielding layer at the side of the plurality of data lines and the plurality of scanning lines facing away from the first base substrate, comprises:
forming the first light shielding layer at the side of the pl

Assignees

• Ordos Yuansheng Optoelectronics Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Yao Lei
• Zhang Yongqiang
• Xin Haoyi
• Xu Jingyi
• Li Feng
• Li Yanfeng

Classifications

• G02F1/136286

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/136209

  Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

• G02F1/136295 Primary

  Materials; Compositions; Manufacture processes · CPC title

• G02F1/1368 Primary

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/1335

  Structural association of cells with optical devices, e.g. polarisers or reflectors · CPC title