Display panel and display apparatus including the same

US2025024725A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025024725-A1
Application numberUS-202418900598-A
CountryUS
Kind codeA1
Filing dateSep 27, 2024
Priority dateSep 3, 2020
Publication dateJan 16, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes: a substrate including a main display area, a first component area, a second component area, and a peripheral area; a first subpixel on the main display area, and a first pixel circuit connected to the first subpixel; a second subpixel on the first component area; a second pixel circuit spaced apart from the second subpixel; and a connection wiring connecting the second subpixel to the second pixel circuit.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel comprising: a substrate comprising a main display area, a first area, and a second area; a first subpixel on the first area; a first pixel circuit on the second area, and connected to the first subpixel; a first scan line in the main display area; and a second scan line in the second area, wherein a resolution of the first area is different from a resolution of the main display area, and wherein the first scan line is electrically connected to the second scan line. 2 . The display panel of claim 1 , wherein the resolution of the first area is less than the resolution of the main display area. 3 . The display panel of claim 1 , further comprising a connection wiring, wherein the connection wiring connects the first subpixel and the first pixel circuit. 4 . The display panel of claim 1 , further comprising a second subpixel on the main display area. 5 . The display panel of claim 4 , further comprising a second pixel circuit on the main display area. 6 . The display panel of claim 5 , wherein the second pixel circuit and the second subpixel overlap each other. 7 . The display panel of claim 4 , wherein a size of the first subpixel is greater than a size of the second subpixel. 8 . The display panel of claim 7 , wherein the first subpixel and the second subpixel are configured to emit a same color of light. 9 . The display panel of claim 1 , wherein the substrate further comprises a third area. 10 . The display panel of claim 9 , further comprising: a third subpixel between the first area and the third area; and a third pixel circuit on the second area and connected to the third subpixel. 11 . The display panel of claim 10 , further comprising a fourth subpixel in the third area. 12 . The display panel of claim 11 , wherein a size of the fourth subpixel is greater than a size of the third subpixel. 13 . The display panel of claim 1 , further comprising a bottom metal layer on the first area. 14 . A display apparatus comprising: a display panel comprising a substrate, the substrate comprising a main display area, a first area, and a second area; and a first component below the display panel corresponding to the first area, wherein the display panel further comprises: a first subpixel on the first area; a first pixel circuit on the second area, and connected to the first subpixel; a first scan line in the main display area; and a second scan line in the second area, wherein a resolution of the first area is different from a resolution of the main display area, and wherein the first scan line is electrically connected to the second scan line. 15 . The display apparatus of claim 14 , wherein the resolution of the first area is less than the resolution of the main display area. 16 . The display apparatus of claim 14 , wherein the display panel further comprises a connection wiring, wherein the connection wiring connects the first subpixel and the first pixel circuit. 17 . The display apparatus of claim 14 , wherein the display panel further comprises a second subpixel on the main display area. 18 . The display apparatus of claim 17 , wherein the display panel further comprises a second pixel circuit on the main display area. 19 . The display apparatus of claim 18 , wherein the second pixel circuit and the second subpixel overlap each other. 20 . The display apparatus of claim 17 , wherein a size of the first subpixel is greater than a size of the second subpixel. 21 . The display apparatus of claim 20 , wherein the first subpixel and the second subpixel are configured to emit a same color of light. 22 . The display apparatus of claim 14 , wherein the substrate further comprises a third area. 23 . The display apparatus of claim 22 , further comprising a second component below the display panel corresponding to the third area. 24 . The display apparatus of claim 22 , wherein the display panel further comprises: a third subpixel between the first area and the third area; and a third pixel circuit on the second area and connected to the third subpixel. 25 . The display apparatus of claim 24 , wherein the display panel further comprises a fourth subpixel in the third area. 26 . The display apparatus of claim 25 , wherein a size of the fourth subpixel is greater than a size of the third subpixel. 27 . The display apparatus of claim 14 , wherein the display panel further comprises a bottom metal layer on the first area.

Assignees

Inventors

Classifications

  • Layout of electrodes and connections · CPC title

  • H10K59/122Primary

    Pixel-defining structures or layers, e.g. banks · CPC title

  • characterised by the geometry or disposition of pixel elements · CPC title

  • Passivation; Containers; Encapsulations · CPC title

  • Details of drivers for scan electrodes · CPC title

Patent family

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Frequently asked questions

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What does patent US2025024725A1 cover?
A display panel includes: a substrate including a main display area, a first component area, a second component area, and a peripheral area; a first subpixel on the main display area, and a first pixel circuit connected to the first subpixel; a second subpixel on the first component area; a second pixel circuit spaced apart from the second subpixel; and a connection wiring connecting the second…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/122. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).