Multilayer ceramic capacitor

US2025014821A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025014821-A1
Application numberUS-202418755754-A
CountryUS
Kind codeA1
Filing dateJun 27, 2024
Priority dateJul 3, 2023
Publication dateJan 9, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Dielectric layers include outer dielectric layers and inner dielectric layers. The outer dielectric layers are located between a first principal surface and an internal electrode layer located closest to the first principal surface in a thickness direction and between a second principal surface and an internal electrode layer located closest to the second principal surface in the thickness direction. The inner dielectric layers are located between internal electrode layers adjacent to each other in the thickness direction. In an element body portion, side margin portions, which are located in a width direction between a first side surface and a plurality of internal electrode layers and between a second side surface and a plurality of internal electrode layers, have a higher Mn content than the inner dielectric layers.

First claim

Opening claim text (preview).

What is claimed is: 1 . A multilayer ceramic capacitor comprising: an element body portion including a first principal surface and a second principal surface opposite to each other in a thickness direction, a first side surface and a second side surface opposite to each other in a width direction, a first end surface and a second end surface opposite to each other in a length direction, and a plurality of dielectric layers and a plurality of internal electrode layers laminated in the thickness direction; and external electrodes respectively on the first end surface and the second end surface, and electrically connected to the plurality of internal electrode layers; wherein each of the plurality of internal electrode layers includes an opposing portion opposed to the internal electrode layer which is adjacent in the thickness direction, and a lead-out portion connecting the opposing portion and the external electrodes; a width of the opposing portion is larger than a width of the lead-out portion in the width direction; the plurality of dielectric layers include outer dielectric layers and inner dielectric layers, the outer dielectric layers being located between the first principal surface and the internal electrode layer located closest to the first principal surface in the thickness direction and between the second principal surface and the internal electrode layer located closest to the second principal surface in the thickness direction, and the inner dielectric layers being located between the internal electrode layers adjacent to each other in the thickness direction; and in the element body portion, side margin portions, which are located in the width direction between the first side surface and the plurality of internal electrode layers and between the second side surface and the plurality of internal electrode layers, have a higher Mn content than the inner dielectric layers. 2 . The multilayer ceramic capacitor according to claim 1 , wherein the outer dielectric layers have a higher Mn content than the inner dielectric layers. 3 . The multilayer ceramic capacitor according to claim 1 , wherein at least one of Si and Mg is segregated in both end portions of the lead-out portion in the width direction. 4 . The multilayer ceramic capacitor according to claim 1 , wherein the side margins are made of a dielectric material including a perovskite compound including Ba and Ti. 5 . The multilayer ceramic capacitor according to claim 4 , wherein the side margins are each defined by a plurality of layers. 6 . The multilayer ceramic capacitor according to claim 1 , wherein a portion of the plurality of internal electrode layers is curved toward first principal surface. 7 . The multilayer ceramic capacitor according to claim 1 , wherein a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction has a parallelogram or substantially parallelogram shape. 8 . The multilayer ceramic capacitor according to claim 7 , wherein corners of the parallelogram or substantially parallelogram shape are rounded. 9 . The multilayer ceramic capacitor according to claim 1 , wherein, in a cross section of the element body portion parallel or substantially parallel to the thickness direction and the width direction, each of the first side surface and the second side surface has a shape that is recessed inward in the width direction toward a central portion in thickness direction. 10 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of the element body portion gradually increases outward from a center portion of the element body portion to an outer portion of the element body portion in the thickness direction.

Assignees

Inventors

Classifications

  • Housing; Encapsulation · CPC title

  • Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

  • based on alkaline earth titanates · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • Stacked capacitors (H01G4/33 takes precedence) · CPC title

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Frequently asked questions

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What does patent US2025014821A1 cover?
Dielectric layers include outer dielectric layers and inner dielectric layers. The outer dielectric layers are located between a first principal surface and an internal electrode layer located closest to the first principal surface in a thickness direction and between a second principal surface and an internal electrode layer located closest to the second principal surface in the thickness dire…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/1218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 09 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).