Method for generating random number and microcontroller unit using the method

Patent metadata

Field	Value
Publication number	US-2024427554-A1
Application number	US-202418748348-A
Country	US
Kind code	A1
Filing date	Jun 20, 2024
Priority date	Jun 21, 2023
Publication date	Dec 26, 2024
Grant date	—

Abstract

A method of generating a random number for a microcontroller unit, the microcontroller unit using the method, an apparatus including the microcontroller unit are provided. The method includes: reading, from a flash memory of the microcontroller unit, a random number generated the previous time the microcontroller unit was powered on, in response to the microcontroller unit being powered on; acquiring, random information of the microcontroller unit and using the random information as a seed of a random number generation algorithm to generate the random number in a case that the reading fails, and using, the read random number as the seed of the random number generation algorithm to generate the random number in case that the reading succeeds; and writing, the generated random number to the flash memory of the microcontroller unit.

First claim

1 . A method of generating a random number for a microcontroller unit, comprising:
reading, from a flash memory of the microcontroller unit, a random number generated the previous time the microcontroller unit was powered on, in response to the microcontroller unit being powered on; acquiring, random information of the microcontroller unit and using the random information as a seed of a random number generation algorithm to generate the random number in a case that the reading fails, and using, the read random number as the seed of the random number generation algorithm to generate the random number in case that the reading succeeds; and writing, the generated random number to the flash memory of the microcontroller unit.

2 . The method of claim 1 , wherein writing the generated random number to the flash memory of the microcontroller unit comprises:
writing the generated random number to one of a plurality of memory cells of a first space selected from the flash memory sequentially according to flash memory addresses of the plurality of memory cells, wherein each of the plurality of memory cells corresponds to a minimum writing unit of the flash memory.

3 . The method of claim 2 , wherein reading, from a flash memory of the microcontroller unit, a random number generated the previous time the microcontroller unit was powered on comprises:
searching for the memory cell where a latest random number was written among the plurality of memory cells of the first space and reading the random number in the memory cell; and erasing the first space to reuse the first space for storing a new random number in a case that the last memory cell of the first space in order of flash memory addresses has been written with a random number.

4 . The method of claim 3 , wherein the first space comprises a plurality of pages, and
wherein writing the generated random number to the flash memory of the microcontroller unit further comprises: when the flash memory address of the memory cell of the first space where a random number is to be written is a start address of one of the plurality of pages, writing a predetermined value to a memory cell of a plurality of memory cells of a second space selected from the flash memory that is used to record a usage of the page, wherein the plurality of memory cells of the second space are used for recording the usage of each of the plurality of pages of the first space, respectively.

5 . The method of claim 4 , wherein searching for the memory cell where the latest random number was written among the plurality of memory cells of the first space comprises:
searching for the memory cell where the latest random number was written among the page of a first space corresponding to the memory cell in the second space where the predetermined value was written latest.

6 . The method of claim 4 , wherein the plurality of memory cells of the second space are also erased while the first space is erased.

7 . The method of claim 1 , wherein the random information comprises a reading of a general-purpose input/output (GPIO) port that is in a floating state of the microcontroller unit and/or a clock difference between a high speed internal clock and a low speed internal clock of the microcontroller unit.

8 . A microcontroller unit comprising:
a reading module, configured to read, from a flash memory of the microcontroller unit, a random number generated the previous time the microcontroller unit was powered on, in response to the microcontroller unit being powered on; an acquiring module, configured to acquire random information of the microcontroller unit in a case that the reading fails; a random number generating module, configured to generate a random number by using the random information as a seed of a random number generation algorithm in a case that the reading fails, and to generate the random number by using the read random number as a seed of the random number generation algorithm in a case that the reading succeeds; and a writing module, writing the generated random number to the flash memory of the microcontroller unit.

9 . The microcontroller unit of claim 8 , wherein the random information comprises a reading of a general-purpose input/output (GPIO) port that is in a floating state of the microcontroller unit and/or a clock difference between a high-speed internal clock and a low-speed internal clock of the microcontroller unit.

10 . A non-transitory computer-readable storage medium having instructions stored thereon which, when executed by a processor, cause the processor to carry out the method of claim 1 .

Assignees

• Schneider Electric Ind Sas

Inventors

• Zhuang Hao
• Xie Juan
• Wang Yuanzhong
• Geffroy Vincent
• Feng Siyang
• Yan Songxue
• Xu Jungang

Classifications

• G06F9/22

  Microcontrol or microprogram arrangements · CPC title

• G06F7/588 Primary

  Random number generators, i.e. based on natural stochastic processes · CPC title

• G06F2212/2022

  Flash memory · CPC title

• G06F12/08

  in hierarchically structured memory systems, e.g. virtual memory systems · CPC title

• G06F7/58 Primary

  Random or pseudo-random number generators · CPC title