Display Panel and Preparation Method Therefor, and Electronic Device

US2024411196A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024411196-A1
Application numberUS-202318700726-A
CountryUS
Kind codeA1
Filing dateMay 5, 2023
Priority dateMay 26, 2022
Publication dateDec 12, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A display panel, a preparation method therefor, and an electronic device. The display panel comprises: a first substrate and a second substrate arranged oppositely; a reflection layer on one side of the first substrate; a color resist layer on the side of the reflection layer away from the first substrate; a pixel electrode layer on the side of the color resist layer away from the first substrate and comprising multiple sub-pixel electrodes arranged at intervals; a common electrode layer on one side of the second substrate; and pixel isolation columns between first and second substrates and defining multiple sub-pixel regions therebetween, are black and white charged microspheres in the sub-pixel regions, there are at least two sub-pixel electrodes in one sub-pixel region, and the area of orthographic projections of the sub-pixel electrodes in one sub-pixel region is less than that of the color resist layer, on the first substrate.

First claim

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1 . A display panel, comprising: a first substrate and a second substrate arranged opposite to each other, wherein a side of the second substrate is a light incidence side; a reflection layer located at a side of the first substrate; a color resistance layer located at a side of the reflection layer away from the first substrate; a pixel electrode layer located at a side of the color resistance layer away from the first substrate, wherein the pixel electrode layer comprises a plurality of sub-pixel electrodes arranged at intervals; a common electrode layer located at a side of the second substrate; and pixel isolation posts located between the first substrate and the second substrate and defining a plurality of sub-pixel regions between the first substrate and the second substrate, wherein there are black charged microspheres and white charged microspheres in the plurality of sub-pixel regions; wherein there are at least two of the sub-pixel electrodes in one of the sub-pixel regions, and an area of orthographic projections of the sub-pixel electrodes in one of the sub-pixel regions on the first substrate is smaller than an area of an orthographic projection of the color resistance layer on the first substrate. 2 . The display panel according to claim 1 , wherein the color resistance layer comprises a plurality of color resistance blocks arranged at intervals, the reflection layer comprises a plurality of reflection blocks arranged at intervals, and the reflection blocks and the color resistance blocks are arranged correspondingly. 3 . The display panel according to claim 2 , further comprising: an insulation layer located at a side of the color resistance layer away from the first substrate and covering the color resistance layer and the reflection layer; wherein the insulation layer further comprises a plurality of through holes, orthographic projections of the through holes on the first substrate do not coincide with an orthographic projection of the reflection layer on the first substrate, the orthographic projections of the through holes on the first substrate do not coincide with an orthographic projection of the color resistance layer on the first substrate, the through holes are filled with the pixel electrode layer, and the pixel electrode layer is electrically connected with the first substrate through the through holes. 4 . The display panel according to claim 1 , wherein the display panel is configured to enable the white charged microspheres to move to the light incidence side when a first voltage is applied to all the sub-pixel electrodes and a second voltage is applied to the common electrode layer, to enable light incident from the light incidence side to be reflected by the white charged microspheres and emitted from the light incidence side to achieve a white state display. 5 . The display panel according to claim 1 , wherein the display panel is configured to enable the black charged microspheres to move to the light incidence side when a first voltage is applied to all the sub-pixel electrodes and a second voltage is applied to the common electrode layer, to enable light incident from the light incidence side to be absorbed by the black charged microspheres to achieve a dark state display. 6 . The display panel according to claim 1 , wherein the color resistance blocks comprise a red color resistance block, a green color resistance block, and a blue color resistance block; the display panel is configured to enable light incident from the light incidence side to be reflected by the reflection layer and emitted from the light incidence side to achieve a color display when a first voltage and a second voltage are applied to at least two of the sub-pixel electrodes in one of the sub-pixel regions, wherein the first voltage and the second voltage are electrically opposite. 7 . The display panel according to claim 6 , wherein a difference between the first voltage and the second voltage is −40 to 40V. 8 . The display panel according to claim 6 , wherein a plurality of sub-pixel electrodes are contained in one of the sub-pixel regions, and a difference between voltages applied to adjacent sub-pixel electrodes is a fixed value. 9 . The display panel according to claim 8 , wherein a number of the sub-pixel electrodes in one of the sub-pixel regions is not more than 10. 10 . The display panel according to claim 8 , wherein the sub-pixel electrodes in the sub-pixel regions are arranged at equal intervals. 11 . The display panel according to claim 8 , wherein the plurality of sub-pixel electrodes in one of the sub-pixel regions are independently controlled for power supply by a drive circuit unit. 12 . The display panel according to claim 1 , wherein a material of the reflection layer is a metal material, and a reflectivity of the metal material is not less than 95%. 13 . The display panel according to claim 1 , wherein a thickness of the color resistance layer is 0.5 to 5 μm. 14 . The display panel according to claim 1 , wherein a diameter of a charged microsphere is 50 to 300 nm, and a charge-mass ratio of the charged microsphere is 1×10 7 to 10×10 7 C/kg. 15 . The display panel according to claim 1 , wherein the black charged microspheres and the white charged microspheres comprise spherical charged particles, or nearly spherical charged particles, or comprise both spherical charged particles and nearly spherical charged particles. 16 . A preparation method for a display panel, applied for preparing the display panel of claim 1 , comprising: forming a reflection layer on a first substrate; forming a color resistance layer on a side of the reflection layer away from the first substrate; forming a pixel electrode layer on a side of the color resistance layer away from the first substrate; forming a common electrode layer on a second substrate; forming pixel isolation posts on the first substrate and/or the second substrate; aligning and coupling the first substrate with the second substrate to form a sub-pixel enclosed space; and injecting ink into the sub-pixel enclosed space and performing a sealing treatment to obtain the display panel. 17 . A display apparatus, comprising: the display panel according to claim 1 .

Assignees

Inventors

Classifications

  • Side-by-side arrangement of working electrodes and counter-electrodes · CPC title

  • Operation of cells; Circuit arrangements affecting the entire cell · CPC title

  • G02F1/167Primary

    by electrophoresis · CPC title

  • Structural association of cells with optical devices, e.g. reflectors or illuminating devices · CPC title

  • for active matrices · CPC title

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What does patent US2024411196A1 cover?
A display panel, a preparation method therefor, and an electronic device. The display panel comprises: a first substrate and a second substrate arranged oppositely; a reflection layer on one side of the first substrate; a color resist layer on the side of the reflection layer away from the first substrate; a pixel electrode layer on the side of the color resist layer away from the first substra…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/167. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 12 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).