High power density capacitor

US2024387115A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024387115-A1
Application numberUS-202418668633-A
CountryUS
Kind codeA1
Filing dateMay 20, 2024
Priority dateMay 19, 2023
Publication dateNov 21, 2024
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An apparatus and method of making the apparatus are provided having a plurality stacked undulating layers having an undulation pattern forming a patterned capacitor. At least one of the plurality of layers includes sublayers of dielectric material materials and electrically conducting materials.

First claim

Opening claim text (preview).

1 . An apparatus comprising: a plurality of sub-capacitors, at least one of which having an undulation or perforation pattern, wherein the apparatus forms a capacitor, and at least one of the plurality of sub-capacitors includes at least one sublayer of dielectric material and at least one electrically conducting material. 2 . The apparatus of claim 1 , wherein the undulation pattern or perforation pattern has an aspect ratio higher than 5 . 3 . The apparatus of claim 1 , wherein the undulation pattern has an RMS roughness of less than 100 microns. 4 . The apparatus of claim 1 , wherein an insulating layer is present between sublayers or sub-capacitors. 5 . The apparatus of claim 1 , wherein at least one dielectric material sublayer includes MXene material. 6 . The apparatus of claim 1 , wherein at least one dielectric material sublayer includes titanium dioxide material. 7 . The apparatus of claim 1 , wherein at least one dielectric material sublayer includes doped titanium dioxide material. 8 . The apparatus of claim 1 , wherein the distance between conducting layers is less than 20 microns. 9 . The apparatus of claim 1 , wherein the largest dimension is more than 1 mm. 10 . The apparatus of claim 1 , wherein the breakdown voltage is more than 1,000 volts. 11 . The apparatus of claim 1 , wherein the breakdown voltage is more than 5,000 volts. 12 . The apparatus of claim 1 , wherein the energy per volume is more than 1,000,000 Joules per cubic meter. 13 . The apparatus of claim 1 , wherein the at least one dielectric material sublayer includes a dielectric material with a dielectric constant higher than 100. 14 . The apparatus of claim 1 , further comprising boost or step down circuits configured to attach the apparatus to a vehicle or a consumer of electricity. 15 . The apparatus of claim 1 , further comprising attachments to transport the apparatus to an energy consumer. 16 . A method for manufacturing a patterned capacitor comprising embossing layers of conductors and insulators, forming stacks of the layers via the sequential application of pressure, applied over a 3D printed shape-defined mold having an undulation pattern. 17 . An apparatus for manufacturing a patterned capacitor comprising: at least one pressure controlled motorized embossing tool configured to press an embossing mold into a film surface for patterning films, wherein the apparatus is used to sequentially stack material films layer by layer for forming a capacitor. 18 . A method for manufacturing a patterned capacitor comprising: assembling perforated conducting materials into sub-capacitors by successively and partially coating the perforated conducting materials with electrolyte and additional conducting materials, wherein the sub-capacitors are assembled into a capacitor. 19 . The method of claim 18 , wherein a perforated or sacrificial insulating or electrolytic layer is placed between the perforated conducting materials to stabilize the assembly during manufacturing. 20 . The method of claim 18 , wherein conducting edges of the sub-capacitors are on different locations of the sub-capacitors to enable assembly during manufacturing.

Assignees

Inventors

Classifications

  • Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations · CPC title

  • inorganic and synthetic material · CPC title

  • Organic dielectrics · CPC title

  • halogenated (H01G4/145 takes precedence) · CPC title

  • of synthetic material, e.g. derivatives of cellulose (H01G4/16 takes precedence) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2024387115A1 cover?
An apparatus and method of making the apparatus are provided having a plurality stacked undulating layers having an undulation pattern forming a patterned capacitor. At least one of the plurality of layers includes sublayers of dielectric material materials and electrically conducting materials.
Who is the assignee on this patent?
Weinberg Medical Physics Inc
What technology area does this patent fall under?
Primary CPC classification H01G4/385. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 21 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).