Package structure and method of forming the same
US-2022320020-A1 · Oct 6, 2022 · US
Semiconductor Device and Method of Forming Double-Sided Rectifying Antenna on Power Module
US2024379511A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024379511-A1 |
| Application number | US-202318314626-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 9, 2023 |
| Priority date | May 9, 2023 |
| Publication date | Nov 14, 2024 |
| Grant date | — |
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- Title
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- Abstract
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- First independent claim
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Abstract
Official abstract text for this publication.
A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical interconnect structure. A second antenna is formed over the second electrical interconnect structure. The first electrical interconnect structure has an insulating material formed over the first surface of the substrate, and a conductive via formed through the insulating material. Alternatively, the first electrical interconnect structure has an insulating layer formed over the first surface of the substrate, a conductive layer formed over the insulating layer, and a conductive via formed through the insulating layer and conductive layer.
First claim
Opening claim text (preview).
What is claimed: 1 . A semiconductor device, comprising: a substrate; a first electrical interconnect structure formed over a first surface of the substrate; a second electrical interconnect structure formed over a second surface of the substrate opposite the first surface of the substrate; a first antenna formed over the first electrical interconnect structure; and a second antenna formed over the second electrical interconnect structure. 2 . The semiconductor device of claim 1 , further including an electrical component disposed over the first surface of the substrate or over the second surface of the substrate. 3 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure includes: an insulating material formed over the first surface of the substrate or over the second surface of the substrate; and a conductive via formed through the insulating material. 4 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure includes: an insulating layer formed over the first surface of the substrate or over the second surface of the substrate; a conductive layer formed over the insulating layer; and a conductive via formed through the insulating layer and conductive layer. 5 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 6 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 7 . A semiconductor device, comprising: a substrate; a first antenna disposed over a first surface of the substrate; and a second antenna disposed over a second surface of the substrate opposite the first surface of the substrate and operate simultaneous with the first antenna. 8 . The semiconductor device of claim 7 , further including an electrical component disposed over the first surface of the substrate or over the second surface of the substrate. 9 . The semiconductor device of claim 7 , further including: a first electrical interconnect structure formed over the first surface of the substrate; and a second electrical interconnect structure formed over the second surface of the substrate. 10 . The semiconductor device of claim 9 , wherein the first electrical interconnect structure includes: an insulating material formed over the first surface of the substrate or over the second surface of the substrate; and a conductive via formed through the insulating material. 11 . The semiconductor device of claim 9 , wherein the first electrical interconnect structure includes: an insulating layer formed over the first surface of the substrate or over the second surface of the substrate; a conductive layer formed over the insulating layer; and a conductive via formed through the insulating layer and conductive layer. 12 . The semiconductor device of claim 9 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 13 . The semiconductor device of claim 9 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 14 . A method of making a semiconductor device, comprising: providing a substrate; forming a first electrical interconnect structure over a first surface of the substrate; forming a second electrical interconnect structure over a second surface of the substrate opposite the first surface of the substrate; forming a first antenna over the first electrical interconnect structure; and forming a second antenna over the second electrical interconnect structure. 15 . The method of claim 14 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate. 16 . The method of claim 14 , wherein forming the first electrical interconnect structure includes: forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and forming a conductive via through the insulating material. 17 . The method of claim 14 , wherein forming the first electrical interconnect structure includes: forming an insulating layer over the first surface of the substrate or over the second surface of the substrate; forming a conductive layer over the insulating layer; and forming a conductive via through the insulating layer and conductive layer. 18 . The method of claim 14 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate. 19 . The method of claim 14 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna. 20 . A method of making a semiconductor device, comprising: providing a substrate; disposing a first antenna over a first surface of the substrate; and disposing a second antenna over a second surface of the substrate opposite the first surface of the substrate and operate simultaneous with the first antenna. 21 . The method of claim 20 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate. 22 . The method of claim 20 , further including: forming a first electrical interconnect structure over the first surface of the substrate; and a second electrical interconnect structure formed over the second surface of the substrate. 23 . The method of claim 22 , wherein forming the first electrical interconnect structure includes: forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and forming a conductive via through the insulating material. 24 . The method of claim 22 , wherein forming the first electrical interconnect structure includes: forming an insulating layer over the first surface of the substrate or over the second surface of the substrate; forming a conductive layer over the insulating layer; and forming a conductive via through the insulating layer and conductive layer. 25 . The method of claim 22 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.
Assignees
Inventors
Classifications
comprising multiple insulating layers · CPC title
of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title
Inductive arrangements (H10W44/20 takes precedence) · CPC title
Shapes or dispositions of interconnections · CPC title
Soldering or alloying · CPC title
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Frequently asked questions
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- What does patent US2024379511A1 cover?
- A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical …
- Who is the assignee on this patent?
- Stats Chippac Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Nov 14 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).