Transmission method
US-9942067-B2 · Apr 10, 2018 · US
Electronic device and modulation method
US2024340214A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024340214-A1 |
| Application number | US-202118568166-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 15, 2021 |
| Priority date | Jul 15, 2021 |
| Publication date | Oct 10, 2024 |
| Grant date | — |
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Abstract
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The present disclosure provides an electronic device and a modulation method. The electronic device includes: a receiving unit, which is configured to obtain a first input bit sequence; and a control unit, which is configured to perform pseudo N-order first type modulation on the first input bit sequence, wherein N first symbols that may be obtained by means of the pseudo N-order first type modulation are a portion of second symbols that may be obtained by means of M-order second type modulation, M and N are positive integers, and M is greater than N.
First claim
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1 . An electronic device, comprising: a receiving unit configured to obtain a first input bit sequence; a control unit configured to perform pseudo N-order first-type modulation on the first input bit sequence, wherein N first symbols obtainable by the pseudo N-order first-type modulation are part of M second symbols obtainable by M-order second-type modulation, wherein M and N are positive integers, and M is greater than N. 2 . The electronic device of claim 1 , wherein the control unit performs the pseudo N-order first-type modulation on the first input bit sequence according to a bit-to-symbol mapping formula or a bit-to-symbol mapping table. 3 . The electronic device of claim 2 , wherein according to the pseudo N-order first-type modulation, a bit-to-symbol mapping is performed in units of p first bits; according to the M-order second-type modulation, a bit-to-symbol mapping is performed in units of q second bits; for the same symbol obtained according to the pseudo N-order first-type modulation and according to the M-order second-type modulation, the p first bits are a function of at least a part of the q second bits, wherein p and q are positive integers, and q is greater than p. 4 . The electronic device of claim 3 , wherein the bit-to-symbol mapping formula or the bit-to-symbol mapping table of the pseudo N-order first-type modulation corresponds to the bit-to-symbol mapping formula or the bit-to-symbol mapping table of the M-order second-type modulation. 5 . The electronic device of claim 2 , wherein according to the pseudo N-order first-type modulation, a bit-to-symbol mapping is performed in units of p first bits; according to the M-order second-type modulation, a bit-to-symbol mapping is performed in units of q second bits; for the same symbol obtained according to the pseudo N-order first-type modulation and according to the M-order second-type modulation, the p first bits are the same as the first p second bits of the q second bits, wherein p and q are positive integers, and q is greater than p. 6 . The electronic device of claim 5 , wherein the bit-to-symbol mapping table of the pseudo N-order first-type modulation corresponds to the bit-to-symbol mapping table of the M-order second-type modulation. 7 . The electronic device of claim 1 , further comprising: the receiving unit configured to receive modulation and coding strategy signaling, the control unit to perform the pseudo N-order first-type modulation on the first input bit sequence according to the modulation and coding strategy signaling and a predetermined modulation and coding strategy table, wherein the first-type modulation is APSK modulation, the predetermined modulation and coding strategy table at least include parameters regarding pseudo N-order APSK modulation. 8 . The electronic device of claim 7 , wherein the predetermined modulation and coding strategy table is a table regarding some or all of modulation and coding strategies supported by a communication system where the electronic device is located. 9 . A modulation method comprising: obtaining a first input bit sequence; performing pseudo N-order first-type modulation on the first input bit sequence, wherein N first symbols obtainable by the pseudo N-order first-type modulation are part of second symbols obtainable by M-order second-type modulation, wherein M and N are positive integers, and M is greater than N. 10 . The method of claim 9 , wherein the pseudo N-order first-type modulation is performed on the first input bit sequence according to a bit-to-symbol mapping formula or a bit-to-symbol mapping table.
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- What does patent US2024340214A1 cover?
- The present disclosure provides an electronic device and a modulation method. The electronic device includes: a receiving unit, which is configured to obtain a first input bit sequence; and a control unit, which is configured to perform pseudo N-order first type modulation on the first input bit sequence, wherein N first symbols that may be obtained by means of the pseudo N-order first type mod…
- Who is the assignee on this patent?
- Ntt Docomo Inc
- What technology area does this patent fall under?
- Primary CPC classification H04L27/38. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Oct 10 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).