Image sensor including device isolation structure

US2024321921A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024321921-A1
Application numberUS-202418610413-A
CountryUS
Kind codeA1
Filing dateMar 20, 2024
Priority dateMar 24, 2023
Publication dateSep 26, 2024
Grant date

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  1. Title

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  5. First independent claim

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Abstract

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Provided is an image sensor including a device isolation structure. The image sensor includes a semiconductor substrate including a pixel array including a plurality of pixels, a first photoelectric conversion device and a second photoelectric conversion device inside the semiconductor substrate and included in each of the plurality of pixels, microlenses on the first photoelectric conversion device and the second photoelectric conversion device and a device isolation structure between the plurality of pixels and between the first photoelectric conversion device and the second photoelectric conversion device, the device isolation structure opening a part between the first photoelectric conversion device and the second photoelectric conversion device, including an open region at each edge of the plurality of pixels, and may be continuous in the pixel array.

First claim

Opening claim text (preview).

1 . An image sensor comprising: a semiconductor substrate including a pixel array including a plurality of pixels; a first photoelectric conversion device and a second photoelectric conversion device inside the semiconductor substrate and included in each of the plurality of pixels; microlenses on the first photoelectric conversion device and the second photoelectric conversion device; and a device isolation structure between the plurality of pixels and between the first photoelectric conversion device and the second photoelectric conversion device, the device isolation structure opening a part between the first photoelectric conversion device and the second photoelectric conversion device, including an open region at each edge of the plurality of pixels, and being continuous in the pixel array. 2 . The image sensor of claim 1 , wherein a ground contact configured to provide a ground voltage to the first photoelectric conversion device and the second photoelectric conversion device is in the open region. 3 . The image sensor of claim 1 , wherein a floating diffusion region configured to accumulate photocharges generated by each of the first photoelectric conversion device and the second photoelectric conversion device is in the open region. 4 . The image sensor of claim 1 , wherein an active region or gate of a transistor included in each of the plurality of pixels is in the open region. 5 . The image sensor of claim 4 , wherein the transistor comprises at least one of a reset transistor configured to reset a floating diffusion region configured to accumulate photocharges generated in the first photoelectric conversion device and the second photoelectric conversion device, an amplification transistor configured to amplify a signal according to the photocharges accumulated in the floating diffusion region, and a selection transistor configured to be connected to the amplification transistor and output a pixel signal. 6 . The image sensor of claim 1 , further comprising a ground contact configured to provide a ground voltage applied to the first photoelectric conversion device and the second photoelectric conversion device, wherein the ground contact is under the edge of each of the first photoelectric conversion device and the second photoelectric conversion device. 7 . (canceled) 8 . The image sensor of claim 1 , further comprising a passivation layer in the open region and doped with p-type impurities. 9 . An image sensor comprising: a first photoelectric conversion device and a second photoelectric conversion device inside a semiconductor substrate and included in each of a plurality of pixels; microlenses on the first photoelectric conversion device and the second photoelectric conversion device; a first device isolation structure between the plurality of pixels; and a second device isolation structure between the first photoelectric conversion device and the second photoelectric conversion device, the second device isolation structure opening a part between the first photoelectric conversion device and the second photoelectric conversion device, including an internal open region at each edge of the plurality of pixels, and the first device isolation structure and the second device isolation structure contacting each other. 10 . The image sensor of claim 9 , wherein the first device isolation structure comprises an external open region configured to open a portion between adjacent pixels. 11 . The image sensor of claim 10 , wherein a ground contact configured to provide a ground voltage to the adjacent pixels is in the external open region. 12 . The image sensor of claim 10 , wherein a floating diffusion region configured to accumulate photocharges generated in each of first photoelectric conversion devices and second photoelectric conversion devices included in two adjacent pixels is in the external open region. 13 . The image sensor of claim 10 , wherein a floating diffusion region configured to accumulate photocharges generated in each of first photoelectric conversion devices and second photoelectric conversion devices included in four adjacent pixels is in the external open region. 14 . The image sensor of claim 9 , wherein a ground contact configured to provide a ground voltage to the first photoelectric conversion device and the second photoelectric conversion device is in the internal open region. 15 . The image sensor of claim 9 , wherein a floating diffusion region configured to accumulate photocharges generated by each of the first photoelectric conversion device and the second photoelectric conversion device is in the internal open region. 16 . The image sensor of claim 9 , wherein an active region or gate of a transistor included in each of the plurality of pixels is in the internal open region. 17 .- 19 . (canceled) 20 . An image sensor comprising: a first chip including a semiconductor substrate including a device isolation structure isolating a plurality of pixels; and a second chip under the first chip and comprising a negative voltage generator configured to apply a negative voltage to the device isolation structure, the first chip including a first photoelectric conversion device and a second photoelectric conversion device inside the semiconductor substrate and included in each of the plurality of pixels; and microlenses on the first photoelectric conversion device and the second photoelectric conversion device, the device isolation structure being between the first photoelectric conversion device and the second photoelectric conversion device, and the device isolation structure opening a part between the first photoelectric conversion device and the second photoelectric conversion device, including an internal open region at each edge of the plurality of pixels, and continuous in the first chip. 21 . The image sensor of claim 20 , wherein the first chip further comprises: a floating diffusion region; a first transmission transistor and a second transmission transistor configured to transmit, to the floating diffusion region, charges generated by the first photoelectric conversion device and the second photoelectric conversion device; a reset transistor configured to reset the floating diffusion region; an amplification transistor configured to amplify a signal according to photocharges accumulated in the floating diffusion region; and a selection transistor, connected to the amplification transistor, configured to output a pixel signal. 22 . The image sensor of claim 20 , further comprising a third chip between the first chip and the second chip, wherein the first chip further comprises a floating diffusion region; and a first transmission transistor and a second transmission transistor configured to transmit, to the floating diffusion region, charges generated by the first photoelectric conversion device and the second photoelectric conversion device, and the third chip comprises a reset transistor configured to reset the floating diffusion region; an amplification transistor configured to amplify a signal according to photocharges accumulated in the floating diffusion region; and a selection transistor, connected to the amplification transistor, configured to output a pixel signal. 23 . The image sensor of claim 20 , wherein a ground contact configured to provide a ground voltage to the first photoelectric conversion device and the second photoelectric conversion device is in the internal open region.

Assignees

Inventors

Classifications

  • Microlenses · CPC title

  • of hybrid image sensors · CPC title

  • H10F39/182Primary

    Colour image sensors · CPC title

  • Interconnections · CPC title

  • Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels · CPC title

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What does patent US2024321921A1 cover?
Provided is an image sensor including a device isolation structure. The image sensor includes a semiconductor substrate including a pixel array including a plurality of pixels, a first photoelectric conversion device and a second photoelectric conversion device inside the semiconductor substrate and included in each of the plurality of pixels, microlenses on the first photoelectric conversion d…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10F39/182. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).