Semiconductor device and method for fabricating the same

US2024292605A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024292605-A1
Application numberUS-202318457337-A
CountryUS
Kind codeA1
Filing dateAug 29, 2023
Priority dateFeb 28, 2023
Publication dateAug 29, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The semiconductor device include a horizontal layer spaced apart from a lower structure to extend along a direction parallel to the lower structure; a first conductive line extending along a direction perpendicular to the lower structure and coupled to one end of the horizontal layer; a data storage element coupled to the other end of the horizontal layer; and a second conductive line extending along a direction across the horizontal layer, wherein the second conductive line comprises: a high work function electrode; and a low work function electrode having a cup shape laterally oriented and disposed adjacent to the first conductive line and having a lower work function than the high work function electrode.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a horizontal layer spaced apart from a lower structure to extend along a direction parallel to the lower structure; a first conductive line extending along a direction perpendicular to the lower structure and coupled to one end of the horizontal layer; a data storage element coupled to the other end of the horizontal layer; and a second conductive line extending along a direction across the horizontal layer, wherein the second conductive line comprises: a high work function electrode; and a low work function electrode having a cup shape laterally oriented and positioned adjacent to the first conductive line and having a lower work function than the high work function electrode. 2 . The semiconductor device of claim 1 , further comprising: a covered barrier layer covering an upper surface, a lower surface, and one side surface of the high work function electrode; and a vertical barrier layer between the other side surface of the high work function electrode and the low work function electrode. 3 . The semiconductor device of claim 1 , wherein the low work function electrode includes an outer surface opposed to the high work function electrode and a bended inner surface opposed to the first conductive line. 4 . The semiconductor device of claim 3 , further comprising: a gap-fill material disposed on the inner surface of the low work function electrode. 5 . The semiconductor device of claim 1 , further comprising: a gap-fill material disposed on an inner surface of the low work function electrode. 6 . The semiconductor device of claim 1 , wherein the low work function electrode includes N-type dopant doped polysilicon. 7 . The semiconductor device of claim 1 , wherein the high work function electrode includes metal, metal nitride, or a combination thereof. 8 . The semiconductor device of claim 1 , wherein the horizontal layer includes a single crystal semiconductor material, a polycrystalline semiconductor material, or an oxide semiconductor material. 9 . The semiconductor device of claim 1 , wherein the horizontal layer comprises: a first doped region coupled to the first conductive line; a second doped region coupled to the data storage element; and a channel between the first doped region and the second doped region. 10 . The semiconductor device of claim 1 , wherein the second conductive line includes a double structure and opposed to each other with the horizontal layer interposed therebetween. 11 . The semiconductor device of claim 1 , wherein the data storage element includes a capacitor, and the capacitor includes a cylindrical first electrode, a second electrode, and a dielectric layer between the first electrode and the second electrode. 12 . The semiconductor device of claim 1 , further comprising: a gate dielectric layer fully covering each of an upper surface and a lower surface of the horizontal layer. 13 . The semiconductor device of claim 1 , further comprising: an additional low work function electrode adjacent to the data storage element and having a lower work function than the high work function electrode.

Assignees

Inventors

Classifications

  • Layouts of interconnections · CPC title

  • Electrodes of devices having potential barriers · CPC title

  • H10D88/00Primary

    Three-dimensional [3D] integrated devices · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

  • Making the capacitor or connections thereto · CPC title

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Frequently asked questions

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What does patent US2024292605A1 cover?
The semiconductor device include a horizontal layer spaced apart from a lower structure to extend along a direction parallel to the lower structure; a first conductive line extending along a direction perpendicular to the lower structure and coupled to one end of the horizontal layer; a data storage element coupled to the other end of the horizontal layer; and a second conductive line extending…
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H10D88/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 29 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).