Method of manufacturing electrode, capacitor and integrated device including the electrode manufactured thereby

Patent metadata

Field	Value
Publication number	US-2024290821-A1
Application number	US-202418444162-A
Country	US
Kind code	A1
Filing date	Feb 16, 2024
Priority date	Feb 21, 2023
Publication date	Aug 29, 2024
Grant date	—

Abstract

A method of manufacturing, by atomic layer deposition, an electrode including a perovskite type crystal structure represented by Formula 1, includes: forming a vanadium-containing precursor on a substrate; forming a vanadium-containing intermediate phase by reacting the vanadium-containing precursor with oxygen molecules; and forming a first thin film by reacting the vanadium-containing intermediate phase with water.wherein, in Formula 1,0.3≤x≤0.7, and2.5≤y≤3.0.

First claim

What is claimed is:

1 . A method of manufacturing, by atomic layer deposition, an electrode including a perovskite type crystal structure represented by Formula 1 below, the method comprising:
depositing a first vanadium (V)-containing precursor on a substrate; forming a first vanadium-containing intermediate phase by reacting the first vanadium-containing precursor with an oxygen molecule (O 2 ); and forming a first thin film by reacting the first vanadium-containing intermediate phase with water (H 2 O),

wherein, in Formula 1,
0.3≤x≤0.7, and
2.5≤y≤3.0.

2 . The method of claim 1 , further comprising:
depositing a strontium (Sr)-containing precursor on the first thin film; and forming a second thin film by reacting the strontium-containing precursor with an oxidizing agent.

3 . The method of claim 2 , wherein the oxidizing agent is at least one of H 2 O 2 , H 2 O, O 2 , or O 3 .

4 . The method of claim 2 , further comprising, between the forming of the first thin film and the forming of the second thin film:
depositing a second vanadium-containing precursor on the first thin film; forming a second vanadium-containing intermediate phase by reacting the second vanadium-containing precursor with an oxygen molecule (O 2 ); and forming a third thin film by reacting the second vanadium-containing intermediate phase with water (H 2 O).

5 . The method of claim 1 , wherein the first vanadium-containing precursor is free of chlorine (Cl).

6 . The method of claim 1 , wherein the first vanadium-containing precursor is vanadyl acetylacetonate.

7 . The method of claim 1 , wherein the depositing of the first vanadium-containing precursor on the substrate is performed at about 350° C. or higher.

8 . The method of claim 1 , wherein the first thin film contains substantially no V 5+ .

9 . The method of claim 2 , wherein the strontium-containing precursor is free of oxygen atoms (O).

10 . The method of claim 2 , wherein the strontium-containing precursor comprises a five-membered carbon ring.

11 . The method of claim 2 , wherein the strontium-containing precursor is Sr(iPr 3 Cp) 2 (Bis(1,2,4-tri-isopropylcyclopentadienyl)strontium).

12 . The method of claim 1 , wherein the substrate comprises at least one of SrTiO 3 , Si, SiO 2 , Ti, TiN, Ta, TaN, W, WN, Nb, or NbN.

13 . The method of claim 1 , wherein y, in Formula 1, is 3.

14 . The method of claim 1 , wherein a carbon content of the electrode is about 3 or less parts by weight per 100 parts by weight of the electrode.

15 . The method of claim 1 , wherein the electrode has a resistivity of about 100 mΩ·cm or less.

16 . The method of claim 1 , wherein the electrode has a thickness of about 0.1 nm to about 1000 nm.

17 . A capacitor comprising:
a first electrode manufactured according to the method of claim 1 and including the perovskite type crystal structure represented by Formula 1; a second electrode opposing the first electrode; and a dielectric thin film between the first electrode and the second electrode.

18 . An integrated device comprising:
an electrode comprising a perovskite type crystal structure represented by Formula 1 below, wherein a carbon content of the electrode is about 3 or less parts by weight per 100 parts by weight of the electrode, and the integrated device is a solar cell device, a secondary battery device, a transparent display device, a flash memory device, or a dynamic random-access memory (DRAM) device:

wherein, in Formula 1,
0.3≤x≤0.7, and
2.5≤y≤3.0.

19 . The integrated device of claim 18 , wherein the electrode is formed by atomic layer deposition.

20 . The integrated device of claim 18 , wherein the electrode has a resistivity of about 100 mΩ·cm or less.

Assignees

• Samsung Electronics Co Ltd
• Univ Ajou Ind Academic Coop Found

Inventors

• Kim Hyungjun
• Lee Sang Woon
• Kim Se Eun
• Lee Hye Min
• Jeon Jae Deock
• Kim Cheheung
• Park Boeun
• Lee Jooho
• Lee Changsoo

Classifications

• H10D1/692 Primary

  Electrodes · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10D1/042 Primary

  using deposition processes to form electrode extensions · CPC title

• H10D1/682 Primary

  having dielectrics comprising perovskite structures · CPC title

• C23C16/45527

  characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations · CPC title