Imaging device and imaging method
US-2023336884-A1 · Oct 19, 2023 · US
Information processing device
US2024276110A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024276110-A1 |
| Application number | US-202218684287-A |
| Country | US |
| Kind code | A1 |
| Filing date | Mar 7, 2022 |
| Priority date | Aug 24, 2021 |
| Publication date | Aug 15, 2024 |
| Grant date | — |
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Abstract
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The present technology relates to an information processing device capable of detecting an event with higher accuracy. The information processing device includes a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent, and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value, in which a gate of a transistor included in the detection circuit includes a plurality of metal layers and a High-K layer. The High-K layer is polarized. The present technology can be applied to, for example, an information processing device that detects an address event for each pixel.
First claim
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What is claimed is: 1 . An information processing device, comprising: a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent; and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value, wherein a gate of a transistor included in the detection circuit includes a plurality of metal layers and a High-K layer. 2 . The information processing device according to claim 1 , wherein the High-K layer is polarized. 3 . The information processing device according to claim 1 , wherein the transistor includes a fully-depleted silicon on insulator (FD-SOI)-type transistor. 4 . The information processing device according to claim 3 , wherein a forward bias is applied to a well layer of the transistor. 5 . The information processing device according to claim 3 , wherein a channel region of the transistor includes a counter-doped region. 6 . The information processing device according to claim 1 , wherein the transistor includes a Fin field effect transistor (FET). 7 . The information processing device according to claim 1 , wherein the transistor includes a gate all around field effect transistor (GAA FET). 8 . The information processing device according to claim 6 , wherein a channel of the transistor includes a counter-doped region. 9 . The information processing device according to claim 1 , wherein the transistor performs a process related to a reset operation. 10 . An information processing device, comprising: a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent; and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value, wherein a transistor included in the detection circuit includes a negative capacitance field effect transistor (NCFET). 11 . ) The information processing device according to claim 10 , wherein the transistor includes a Fin field effect transistor (FET). 12 . The information processing device according to claim 10 , wherein the transistor includes a gate all around field effect transistor (GAA FET). 13 . An information processing device, comprising: a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent; and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value, wherein a transistor included in the detection circuit includes a fully-depleted silicon on insulator (FD-SOI)-type transistor. 14 . The information processing device according to claim 13 , wherein a channel region of the transistor includes a counter-doped region. 15 . An information processing device, comprising: a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent; and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value, wherein a transistor included in the detection circuit includes a tunnel field effect transistor (TFET).
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- What does patent US2024276110A1 cover?
- The present technology relates to an information processing device capable of detecting an event with higher accuracy. The information processing device includes a plurality of detection pixels that generates a voltage signal in accordance with a logarithmic value of a photocurrent, and a detection circuit that detects whether or not a change amount of the voltage signal of a detection pixel in…
- Who is the assignee on this patent?
- Sony Semiconductor Solutions Corp
- What technology area does this patent fall under?
- Primary CPC classification H10F39/12. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Aug 15 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).