Automated inspection system
US-2024420305-A1 · Dec 19, 2024 · US
US2024265496A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024265496-A1 |
| Application number | US-202218564341-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jan 26, 2022 |
| Priority date | Sep 23, 2021 |
| Publication date | Aug 8, 2024 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
The image processing apparatus comprises at least a first arithmetic unit and a second arithmetic unit. The first arithmetic unit and the second arithmetic unit are cascaded by means of a serial transceiver, and are configured to execute the image processing method in parallel. The image processing method comprises: acquiring sub-images obtained by segmenting an original image by an external processor, and using the sub-images as current-level result images; extracting current-level image elements in the current-level result images according to a specified convolution kernel and the segmentation mode in which the sub-images are obtained; sending the current-level image elements to a front-level arithmetic unit, and receiving a back-level image elements sent by a back-level arithmetic unit; synthesizing the current-level result images and the back-level image elements into current-level images to be processed; and performing convolution operation on said current-level images to obtain the current-level result images.
Opening claim text (preview).
1 . An image processing method, applied to an arithmetic unit in an image processing apparatus, wherein the image processing apparatus comprises at least a first arithmetic unit and a second arithmetic unit, the first arithmetic unit and the second arithmetic unit are cascaded by means of a serial transceiver, the first arithmetic unit and the second arithmetic unit are configured to execute the image processing method in parallel, and the image processing method comprises: acquiring sub-images obtained by segmenting an original image by an external processor, and using the sub-images as current-level result images; extracting current-level image elements in the current-level result images according to a specified convolution kernel and a segmentation mode in which the sub-images are obtained; sending the current-level image elements to a front-level arithmetic unit, and receiving back-level image elements sent by a back-level arithmetic unit; and synthesizing the current-level result images and the back-level image elements into current-level images to be processed; and performing convolution operation on said current-level images to be processed to obtain the current-level result images. 2 . The image processing method of claim 1 , wherein, when the current-level result images reach a preset standard, the execution process of the image processing method ends; and when the current-level result images fail to reach the preset standard, the execution process of the image processing method is executed iteratively. 3 . The image processing method of claim 1 , wherein the step of acquiring sub-images obtained by segmenting an original image by an external processor comprises: segmenting the original image horizontally in a direction parallel to a width edge of the original image, to obtain the sub-images; or, segmenting the original image vertically in a direction parallel to a height edge of the original image, to obtain the sub-images. 4 . The image processing method of claim 1 , wherein the convolution kernel has a width N and a height M; the width N is a positive odd number; the height M is a positive odd number; the number of channels of the convolution kernel is the same as the number of channels of the current-level images to be processed; and parameters of the convolution kernel are obtained by pre-training. 5 . The image processing method of claim 4 , wherein the step of extracting current-level image elements in the current-level result images according to a specified convolution kernel and a segmentation mode in which the sub-images are obtained comprises: when the original image is segmented horizontally in a direction parallel to the width edge of the original image, copying M−1 stripes of pixels, adjacent to a boundary of each front-level result image, from the current-level result images as the current-level image elements; and when the original image is segmented vertically in a direction parallel to the height edge of the original image, copying N−1 stripes of pixels, adjacent to a boundary of each front-level result image, from the current-level result images as the current-level image elements. 6 . The image processing method of claim 1 , wherein the step of synthesizing the current-level result images and the back-level image elements into current-level images to be processed comprises: splicing the back-level image elements in sequence to a boundary connected with each current-level result image; and taking the spliced images as the current-level images to be processed. 7 . The image processing method of claim 1 , wherein the step of performing convolution operation on said current-level images to be processed comprises: setting a uniform step value for a complete convolution operation; and starting the process of convolution operation. 8 . An image processing apparatus, comprising: at least a first arithmetic unit and a second arithmetic unit; wherein both the first arithmetic unit and the second arithmetic unit are configured to execute the image processing method of claim 1 in parallel; the first arithmetic unit and the second arithmetic unit are cascaded by means of a serial transceiver; as a front-level arithmetic unit, the first arithmetic unit is configured to receive image elements; as a back-level arithmetic unit, the second arithmetic unit is configured to send image elements; and the serial transceiver is configured to take the image elements of the back-level arithmetic unit as back-level image elements and send the back-level image elements to the front-level arithmetic unit. 9 . (canceled) 10 . An image processing electronic device, comprising a memory and one or more processors, the memory has computer readable instructions stored therein, and the computer readable instructions, when executed by the one or more processors, enable the one or more processors to perform steps of the image processing method of claim 1 . 11 . (canceled) 12 . The image processing method according to claim 1 , wherein, in response to that the current-level result images reach a preset standard, the arithmetic unit in the image processing apparatus sends the current-level result images to the external processor, and the execution process of the image processing method is ended. 13 . The image processing method according to claim 1 , wherein, in response to that the current-level result images fail to reach a preset standard, the arithmetic unit of the image processing apparatus does not send the current-level result images to the external processor. 14 . The image processing method according to claim 7 , wherein, a step value of the convolution kernel is set to 1. 15 . The image processing method according to claim 1 , wherein, the step of acquiring sub-images obtained by segmenting an original image by an external processor and using the sub-images as current-level result images comprises: extracting, by the external processor, an original image from an external memory; performing lossless segmentation, by the external processor, on the original image to obtain sub-images arranged in sequence; and sending, by the external processor, the sequentially arranged sub-images to the corresponding arithmetic unit. 16 . The image processing method according to claim 1 , wherein, in a case that the number of pixel points on a width edge or a height edge of the original image is not divisible by the number of the sub-images, the width edge or the height edge of a sub-image of the first order or a sub-image of the last order is adjusted to ensure that sub-images of other orders are uniformly segmented, and the data amount of each sub-image is less than an internal memory capacity of the corresponding arithmetic unit. 17 . The image processing method according to claim 12 , wherein, the external processor sequentially splices the result images sent back by each arithmetic unit, to synthesize a final result image. 18 . The image processing method according to claim 17 , wherein, the process of synthesizing a final result image is an inverse process of the process of obtaining sub-images by segmenting an original image. 19 . The image processing method according to claim 16 , wherein, the sub-images of other orders are uniformly segmented according to: the size of area of the original image, or the size of data amount of the original image. 20 . The image processing apparatus according to claim 8 , wherein, when the image processing method is executed by the
Learning methods · CPC title
Convolutional networks [CNN, ConvNet] · CPC title
Processor architectures; Processor configuration, e.g. pipelining · CPC title
Image fusion; Image merging · CPC title
using two or more images, e.g. averaging or subtraction · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.