Systems, methods, and apparatus for intermediary representations of workflows for computational devices

Patent metadata

Field	Value
Publication number	US-2024220266-A1
Application number	US-202318214522-A
Country	US
Kind code	A1
Filing date	Jun 26, 2023
Priority date	Dec 29, 2022
Publication date	Jul 4, 2024
Grant date	—

Abstract

A method may include receiving, by at least one processing circuit, an input representation of a computational workflow, wherein the input representation may include at least one instruction in an input format, and generating, by the at least one processing circuit, based on the input representation, an intermediary format representation of the computational workflow, wherein the intermediary format representation may include at least one intermediary format instruction for a computational device. The at least one intermediary format instruction may include an instruction to perform, by the computational device, at least one of a load operation, a store operation, or a computational operation. The generating the intermediary format representation may include generating the intermediary format representation based on an arrangement of the computational workflow.

First claim

1 . A method comprising:
receiving, by at least one processing circuit, an input representation of a computational workflow, wherein the input representation comprises at least one instruction in an input format; and generating, by the at least one processing circuit, based on the input representation, an intermediary format representation of the computational workflow; wherein the intermediary format representation comprises at least one intermediary format instruction for a computational device.

2 . The method of claim 1 , wherein the at least one intermediary format instruction comprises an instruction to perform, by the computational device, at least one of a load operation, a store operation, or a computational operation.

3 . The method of claim 1 , wherein the generating the intermediary format representation comprises generating the intermediary format representation based on an arrangement of the computational workflow.

4 . The method of claim 1 , wherein the input representation is a first input representation, the input format is a first input format, the method further comprising:
receiving, by the at least one processing circuit, a second input representation of the computational workflow, wherein the second input representation comprises at least one instruction in a second input format; and generating, by the at least one processing circuit, based on the second input representation, the intermediary format representation of the computational workflow.

5 . A method comprising:
receiving, by at least one processing circuit, an intermediary format representation of a workflow for a computational device, wherein the intermediary format representation comprises at least one intermediary format instruction; and executing, by the at least one processing circuit, the intermediary format representation.

6 . The method of claim 5 , wherein the executing the intermediary format representation comprises generating, based on the intermediary format representation, a device format instruction.

7 . The method of claim 6 , further comprising executing, by the computational device, the device format instruction.

8 . The method of claim 6 , further comprising sending the device format instruction to the computational device.

9 . The method of claim 5 , wherein:
the at least one processing circuit comprises an execution apparatus at the computational device; and the executing the intermediary format representation comprises executing, by the execution apparatus, at least one of the at least one intermediary format instruction.

10 . The method of claim 5 , wherein the executing the intermediary format representation comprises communicating using an application programming interface for the computational device.

11 . The method of claim 5 , wherein the executing the intermediary format representation comprises modifying the intermediary format instruction based on an application programming interface for the computational device.

12 . The method of claim 5 , wherein the executing the intermediary format representation comprises processing the intermediary format instruction.

13 . The method of claim 12 , wherein the processing the intermediary format instruction comprises generating, based on the intermediary format instruction, a device format instruction.

14 . The method of claim 13 , wherein the processing the intermediary format instruction further comprises sending the device format instruction to the computational device.

15 . The method of claim 5 , wherein the executing the intermediary format representation comprises executing the intermediary format representation based on an arrangement of the workflow.

16 . The method of claim 5 , wherein the executing the intermediary format representation comprises performing at least one of a load operation, a store operation, or a computational operation.

17 . The method of claim 5 , wherein the at least one processing circuit is at least one first processing circuit, the method further comprising:
receiving, by at least one second processing circuit, the intermediary format representation of the workflow for a computational device, wherein the intermediary format representation comprises at least one intermediary format instruction; and executing, by the at least one second processing circuit, the intermediary format representation.

18 . The method of claim 17 , wherein:
the executing, by the at least one first processing circuit, the intermediary format representation provides a result; and the executing, by the at least one first processing circuit, the intermediary format representation provides the result.

19 . An apparatus comprising:
a computational device comprising:
a communication interface; and
at least one computational resource;
wherein the computational device is configured to:
receive, by the communication interface, an intermediary format instruction; and
execute, at least in part, by the at least one computational resource, the intermediary format instruction.

20 . The apparatus of claim 19 , wherein:
the computational device is configured to generate, based on the intermediary format instruction, at least one device format instruction; and the computational device is configured to execute, at least in part, the intermediary format instruction by executing, at least in part, the device format instruction.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Bryson Matthew Shaun
• Pinto Oscar P
• MARAM Vishwanath
• Bostandoost Nik Seyed Mehdi
• Loganathan Sainathan
• Liu Wenjie

Classifications

• G06F9/3001

  Arithmetic instructions · CPC title

• G06F9/30043

  LOAD or STORE instructions; Clear instruction · CPC title

• G06F15/7867

  with reconfigurable architecture · CPC title

• G06F8/37

  Compiler construction; Parser generation · CPC title

• G06F8/34

  Graphical or visual programming · CPC title