Electrostatic discharge protection circuit

Patent metadata

Field	Value
Publication number	US-2024186220-A1
Application number	US-202418442671-A
Country	US
Kind code	A1
Filing date	Feb 15, 2024
Priority date	Nov 23, 2020
Publication date	Jun 6, 2024
Grant date	—

Abstract

An electrostatic discharge protection circuit includes: a first electrostatic discharge protection device structure; a first contact pad above the first electrostatic discharge protection device structure in a cross-sectional view; and below the first electrostatic discharge protection device structure in the cross-sectional view, a metal connection coupling the first electrostatic discharge protection device structure to a second contact pad remote from the first contact pad, wherein the metal connection in the cross-sectional view only partially overlaps the first electrostatic discharge protection device structure.

First claim

What is claimed is:

1 . An electrostatic discharge protection circuit, comprising:
a first electrostatic discharge protection device structure; a first contact pad above the first electrostatic discharge protection device structure in a cross-sectional view; and below the first electrostatic discharge protection device structure in the cross-sectional view, a metal connection coupling the first electrostatic discharge protection device structure to a second contact pad remote from the first contact pad, wherein the metal connection in the cross-sectional view only partially overlaps the first electrostatic discharge protection device structure.

2 . The circuit of claim 1 , further comprising a molded carrier.

3 . The circuit of claim 1 , wherein the first electrostatic discharge protection device structure comprises one or more doped layers adjacent to the first contact pad.

4 . The circuit of claim 1 , wherein the first electrostatic discharge protection device structure is formed in a first area on a front side of a semiconductor substrate, wherein a second contact pad is formed in a second area on the front side of the semiconductor substrate, and wherein the metal connection connects the first electrostatic discharge protection device structure to the second area.

5 . The circuit of claim 4 , further comprising a carrier at a back side of the semiconductor substrate.

6 . The circuit of claim 5 , wherein the carrier is molded on the back side of the semiconductor substrate.

7 . The circuit of claim 4 , wherein a space between the first area and the second area is filled by a dielectric material.

8 . The circuit of claim 4 , wherein the metal connection is partly covered by the dielectric material.

9 . The circuit of claim 4 , further comprising a second electrostatic discharge protection device structure between the metal connection and the second contact pad.

10 . The circuit of claim 9 , wherein the first electrostatic discharge protection device structure comprises a Zener diode structure, and wherein the second electrostatic discharge protection device structure comprises a pin diode or contact structure.

11 . The circuit of claim 9 , further comprising:
a third electrostatic discharge protection device structure in the second area; and a further metal connection between the third electrostatic discharge protection device structure and the first area.

12 . The circuit of claim 11 , wherein the third electrostatic discharge protection device structure is a same type of device structure as the first electrostatic discharge protection device structure.

13 . The circuit of claim 12 , further comprising a fourth electrostatic discharge protection device structure between the further metal connection and a fourth contact pad.

14 . The circuit of claim 11 , wherein the fourth electrostatic discharge protection device structure is a same type of device structure as the second electrostatic discharge protection device structure.

15 . The circuit of claim 11 , wherein the first, second, third, and fourth electrostatic discharge protection device structures are arranged in an antiparallel configuration.

16 . The circuit of claim 1 , wherein the first electrostatic discharge protection device structure comprises a Zener diode structure.

Assignees

• Infineon Technologies Ag

Inventors

• Schmenn Andre
• Diefenbeck Klaus
• Willemen Joost Adriaan

Classifications

• H10W74/01

  Manufacture or treatment · CPC title

• H10W20/40 Primary

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10D89/611

  using diodes as protective elements · CPC title

• H10D89/921 Primary

  characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title