Transmission interface and transmitter

Patent metadata

Field	Value
Publication number	US-2024160236-A1
Application number	US-202218550755-A
Country	US
Kind code	A1
Filing date	Mar 25, 2022
Priority date	Mar 25, 2021
Publication date	May 16, 2024
Grant date	—

Abstract

The transmission interface includes a plurality of transmitters, wherein the transmitters are provided with: a power supply terminal shared by the plurality of transmitters, configured to receive a ground voltage; a bias terminal configured to receive a bias voltage; signal terminals configured to receive a signal voltage; a power supply fluctuation inverting bias unit to which a ground voltage and a bias voltage are applied, and which outputs the ground voltage making its fluctuation 180 degrees out of phase; a modulation unit to which the output of the power supply fluctuation inverting bias unit and a signal voltage are applied, and which outputs the opposite phase ground voltage making its fluctuation in phase; and a laser diode to which the ground voltage and the output of the modulation unit are applied.

First claim

1 - 5 . (canceled)

6 . A transmission interface comprising:
a plurality of transmitters, each of the plurality of transmitters comprising:
a power supply terminal which is common to the plurality of transmitters, and configured to receive a first voltage;
a bias terminal configured to receive a second voltage;
a signal terminal configured to receive a signal voltage;
a power supply fluctuation inverting bias circuit to which the first voltage and the second voltage are applied, the power supply fluctuation inverting bias circuit being configured to output fluctuation in the first voltage in opposite phase;
a modulating circuit to which the output of the power supply fluctuation inverting bias circuit and the signal voltage are applied, and configured to output an inverted-phase fluctuation in the first voltage by making the fluctuation in phase; and
a laser diode to which the first voltage and an output of the modulating circuit are applied.

7 . The transmission interface according to claim 6 , wherein:
the power supply fluctuation inverting bias circuit includes a fluctuation inverting transistor; the modulating circuit includes a modulating transistor; the fluctuation in the first voltage from the power supply terminal and the second voltage are applied to a gate of the fluctuation inverting transistor; and the modulating transistor has a gate to which an output of the power supply fluctuation inverting bias circuit and the signal voltage are applied.

8 . The transmission interface according to claim 7 , further comprising:
a power supply fluctuation conveying circuit connected to the power supply terminal; a fluctuation cut-off circuit connected to the bias terminal; and an input circuit connected to the signal terminal, wherein the power supply fluctuation conveying circuit and the fluctuation cut-off circuit are connected to the gate of the fluctuation inverting transistor; and a drain of the fluctuation inverting transistor and the input circuit are connected to the gate of the modulating transistor.

9 . The transmission interface according to claim 8 , wherein the input circuit comprises:
a capacitance circuit connected between the signal terminal and the gate of the modulating transistor; and a termination load connected to an input terminal of the capacitance circuit.

10 . A transmitter comprising:
a transmission interface comprising a plurality of transmitters, each of the plurality of transmitters comprising:
a power supply terminal which is common to the plurality of transmitters, and configured to receive a first voltage;
a bias terminal configured to receive a second voltage;
a signal terminal configured to receive a signal voltage;
a power supply fluctuation inverting bias circuit to which the first voltage and the second voltage are applied, the power supply fluctuation inverting bias circuit being configured to output fluctuation in the first voltage in opposite phase;
a modulating circuit to which the output of the power supply fluctuation inverting bias circuit and the signal voltage are applied, and configured to output an inverted-phase fluctuation in the first voltage by making the fluctuation in phase; and
a laser diode to which the first voltage and an output of the modulating circuit are applied;
a first power supply connected to the power supply terminal; a second power supply connected to the bias terminal; and a plurality of signal sources respectively connected to the signal terminals of the plurality of transmitters.

11 . The transmitter according to claim 10 , wherein:
the power supply fluctuation inverting bias circuit includes a fluctuation inverting transistor; the modulating circuit includes a modulating transistor; the fluctuation in the first voltage from the power supply terminal and the second voltage are applied to a gate of the fluctuation inverting transistor; and the modulating transistor has a gate to which an output of the power supply fluctuation inverting bias circuit and the signal voltage are applied.

12 . The transmitter according to claim 11 , wherein the transmission interface further comprises:
a power supply fluctuation conveying circuit connected to the power supply terminal; a fluctuation cut-off circuit connected to the bias terminal; and an input circuit connected to the signal terminal, wherein the power supply fluctuation conveying circuit and the fluctuation cut-off circuit are connected to the gate of the fluctuation inverting transistor; and a drain of the fluctuation inverting transistor and the input circuit are connected to the gate of the modulating transistor.

13 . The transmitter according to claim 12 , wherein the input circuit further comprises:
a capacitance circuit connected between the signal terminal and the gate of the modulating transistor; and a termination load connected to an input terminal of the capacitance circuit.

14 . A transmitter comprising:
a power supply terminal configured to receive a first voltage; a bias terminal configured to receive a second voltage; a signal terminal configured to receive a signal voltage; a power supply fluctuation inverting bias circuit to which the first voltage and the second voltage are applied, the power supply fluctuation inverting bias circuit being configured to output fluctuation in the first voltage in opposite phase; a modulating circuit to which the output of the power supply fluctuation inverting bias circuit and the signal voltage are applied, and configured to output an inverted-phase fluctuation in the first voltage by making the fluctuation in phase; and a laser diode to which the first voltage and an output of the modulating circuit are applied.

15 . The transmitter according to claim 14 , wherein the power supply terminal is common to a plurality of transmitters.

16 . The transmitter according to claim 14 , wherein:
the power supply fluctuation inverting bias circuit includes a fluctuation inverting transistor; the modulating circuit includes a modulating transistor; the fluctuation in the first voltage from the power supply terminal and the second voltage are applied to a gate of the fluctuation inverting transistor; and the modulating transistor has a gate to which an output of the power supply fluctuation inverting bias circuit and the signal voltage are applied.

17 . The transmitter according to claim 16 , wherein the transmitter further comprises:
a power supply fluctuation conveying circuit connected to the power supply terminal; a fluctuation cut-off circuit connected to the bias terminal; and an input circuit connected to the signal terminal, wherein the power supply fluctuation conveying circuit and the fluctuation cut-off circuit are connected to the gate of the fluctuation inverting transistor; and a drain of the fluctuation inverting transistor and the input circuit are connected to the gate of the modulating transistor.

18 . The transmitter according to claim 17 , wherein the input circuit further comprises:
a capacitance circuit connected between the signal terminal and the gate of the modulating transistor; and a termination load connected to an input terminal of the capacitance circuit.

Assignees

• Nippon Telegraph & Telephone
• Ntt Innovative Devices Corp

Inventors

• Minotani Tadashi
• Kishi Toshiki
• Tobayashi Masatoshi
• Urabe Yoshikazu
• Toyoda Nobuhiro

Classifications

• H03F1/301

  in MOSFET amplifiers (H03F1/303, H03F1/305, H03F1/308 take precedence) · CPC title

• H03F2200/18

  the bias of the gate of a FET being controlled by a control signal · CPC title

• H03F1/26 Primary

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• H03K17/56

  by the use, as active elements, of semiconductor devices (using diodes H03K17/74) · CPC title