Local oscillator (lo) generation for carrier aggregation in phased array front ends

Patent metadata

Field	Value
Publication number	US-2024137051-A1
Application number	US-202418401893-A
Country	US
Kind code	A1
Filing date	Jan 2, 2024
Priority date	Aug 26, 2019
Publication date	Apr 25, 2024
Grant date	—

Abstract

Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

First claim

What is claimed is:

1 . A local oscillator (LO) signal generator, comprising:
a frequency synthesizer configured to generate a first reference signal having a first frequency; a digital to time converter (DTC) configured to generate a second reference signal based upon the first reference signal, the second reference signal having a second frequency that is a fractional multiple of the first frequency; a high-band (HB) path including a HB injection locked frequency multiplier (ILFM), the HB ILCM configured to generate one or more HB local oscillator (LO) signals having a HB LO frequency that is based upon the first frequency associated with the first reference signal; and a low-band (LB) frequency path including a LB ILFM, the LB ILCM configured to generate one or more LB local oscillator (LO) signals having a LB LO frequency that is based upon the second frequency associated with the second reference signal.

2 . The LO signal generator of claim 1 , wherein the HB ILCM is from among a plurality of HB ILCMs within the HB path, each one of the plurality of HB ILCMs being associated with a respective transceiver chain, and
wherein the LB ILCM is from among a plurality of LB ILCMs within the LB path, each one of the plurality of LB ILCMs being associated with a respective transceiver chain.

3 . The LO signal generator of claim 1 , wherein the HB ILCM is configured to generate a set of quadrature LO signals as the one or more HB LO signals, and
wherein the LB ILCM is configured to generate a set of quadrature LO signals as the one or more LB LO signals.

4 . The LO signal generator of claim 1 , wherein the HB ILCM is coupled to one or more mixers configured to perform direct downconversion of received signals to baseband using the one or more HB LO signals, and
wherein the LB ILCM is coupled to one or more mixers configured to perform direct downconversion of received signals to baseband using the one or more LB LO signals.

5 . The LO signal generator of claim 4 , wherein the received signals that are directly downconverted to baseband via the one or more mixers in the HB path and the received signals that are directly downconverted to baseband via the one or more mixers in the LB path are within a range of mm-wave frequencies.

6 . The LO signal generator of claim 1 , wherein the HB ILFM is configured to generate the one or more HB LO signals having the HB LO frequency that is an integer multiple of the first frequency associated with the first reference signal.

7 . The LO signal generator of claim 1 , further comprising:
a further DTC configured to generate, from the first reference signal, a fractionally-multiplied first reference signal having a frequency that is a fractional multiple of the first frequency, wherein the HB ILFM is configured to generate the one or more HB LO signals having the HB LO frequency that is an integer multiple of the fractional multiple of the first frequency associated with the fractionally-multiplied first reference signal.

8 . The LO signal generator of claim 1 , further comprising:
frequency divider circuitry configured to perform frequency division on the first reference signal to generate a frequency-divided reference signal, and wherein the DTC is further configured to perform a fractional multiplication of the frequency-divided reference signal to generate the second reference signal.

9 . The LO signal generator of claim 1 , wherein the DTC is configured to receive digital phase ramp data that is varied to adjust the fractional multiple of the first frequency to thereby adjust the second frequency associated with the second reference signal.

10 . A local oscillator (LO) signal generator, comprising:
a frequency synthesizer configured to generate a first reference signal having a first frequency; a first digital to time converter (DTC) configured to generate a second reference signal based upon the first reference signal, the second reference signal having a second frequency that is a fractional multiple of the first frequency; an intermediate frequency (IF) mixing stage configured to generate (i) a first up-converted analog IF signal based upon the first reference signal, and (ii) a second up-converted analog IF signal based upon the first reference signal; and a transmission mixing stage including:
a first high band (HB) injection locked frequency multiplier (ILFM) configured to generate one or more HB TX local oscillator (LO) signals, and to up-convert the first up-converted analog IF signal to a first transmission frequency, the HB TX LO signals having a HB TX LO frequency that is based upon the second frequency of the second reference signal; and
a first low band (LB) ILFM configured to generate one or more LB TX local oscillator (LO) signals, and to up-convert the second up-converted analog IF signal to a second transmission frequency, the LB TX LO signals having a LB TX LO frequency that is based upon the second frequency of the second reference signal.

11 . The LO signal generator of claim 10 , wherein:
the HB TX LO frequency is based upon a first integer multiple of the first reference signal, the LB TX LO frequency is based upon a second integer multiple of the second reference signal, and the first integer multiple is different than the second integer multiple.

12 . The LO signal generator of claim 10 , further comprising:
a second DTC coupled to the first HB ILFM, the second DTC configured to further fractionally-multiply the second frequency associated with the second reference signal, wherein the first HB ILFM is configured to generate the one or more HB TX LO signals having the HB LO TX frequency that is a first integer multiple of the further fractional multiple of the second frequency of the second reference signal generated via the second DTC.

13 . The LO signal generator of claim 12 , further comprising:
a third DTC coupled to the first LB ILFM, the third DTC configured to further fractionally-multiply the second frequency associated with the second reference signal, wherein the first LB ILFM is configured to generate the one or more LB TX LO signals having the LB TX LO frequency that is a second integer multiple of the further fractional multiple of the second frequency of the second reference signal generated via the third DTC.

14 . The LO signal generator of claim 10 , further comprising:
frequency divider circuitry configured to perform frequency division of the first reference signal to generate a frequency-divided reference signal, and wherein the first DTC is further configured to perform fractional multiplication of the frequency-divided reference signal to generate the second reference signal.

15 . The LO signal generator of claim 10 , further comprising:
a second HB ILFM configured to frequency multiply the first reference signal to generate one or more HB IF LO signals for up-conversion of a first baseband signal to the first up-converted analog IF signal via the IF mixing stage; and a second LB ILFM configured to frequency multiply the first reference signal to generate one or more LB IF LO signals for up-conversion of a second baseband signal to the second up-converted analog IF signal via the IF mixing stage.

16 . The LO signal generator of claim 15 , wherein the second HB ILCM is configured to generate a set of quadrature LO signals as the one or more HB IF LO signals, and
wherein the second LB ILCM is configured to generate a set of quadrature LO signals as the one or more LB IF LO signals.

17 . The LO signal generator of claim 10 , wher

Assignees

• Intel Corp

Inventors

• Ravi Ashoke
• Jann Benjamin
• Patnaik Satwik

Classifications

• H04B1/0458 Primary

  Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H) · CPC title

• G01R27/06

  Measuring reflection coefficients; Measuring standing-wave ratio · CPC title

• H01Q3/40

  with phasing matrix · CPC title

• H03L7/0816

  the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input · CPC title

• H03L7/24

  using a reference signal directly applied to the generator · CPC title