High electron mobility transistor and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-2024128353-A1
Application number	US-202318395654-A
Country	US
Kind code	A1
Filing date	Dec 25, 2023
Priority date	Oct 9, 2019
Publication date	Apr 18, 2024
Grant date	—

Abstract

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.

First claim

What is claimed is:

1 . A method for fabricating high electron mobility transistor (HEMT), comprising:
forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a first hard mask on the barrier layer; forming a second hard mask on the first hard mask; removing the second hard mask and the first hard mask to form a recess; and forming a p-type semiconductor layer on the barrier layer.

2 . The method of claim 1 , further comprising:
patterning the second hard mask, the first hard mask, the barrier layer, and the buffer layer; forming a third hard mask on the second hard mask and sidewalls of the barrier layer and the buffer layer; forming the p-type semiconductor layer in the recess and on the barrier layer; removing the third hard mask and the second hard mask; forming a passivation layer on the first hard mask; forming a gate electrode on the p-type semiconductor layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

3 . The method of claim 2 , further comprising forming the passivation layer on the p-type semiconductor layer and sidewalls of the barrier layer and the buffer layer.

4 . The method of claim 2 , wherein the second hard mask and the third hard mask comprise a same material.

5 . The method of claim 1 , wherein the first hard mask and the second hard mask comprise different materials.

6 . The method of claim 1 , wherein the barrier layer comprises Al x Ga 1-x N.

7 . The method of claim 1 , wherein the buffer layer comprises gallium nitride (GaN).

Assignees

• United Microelectronics Corp

Inventors

• Chang Chun-Ming
• Huang Che-Hung
• Liao Wen-Jung
• Hou Chun-Liang

Classifications

• H10P76/405

  characterised by their composition, e.g. multilayer masks · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D30/475 Primary

  having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs · CPC title

• H10D30/015 Primary

  of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT · CPC title

• H10D62/852

  being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP · CPC title