Pulse radar device and operating method thereof

US2024125911A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024125911-A1
Application numberUS-202318480847-A
CountryUS
Kind codeA1
Filing dateOct 4, 2023
Priority dateOct 14, 2022
Publication dateApr 18, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure relates to a pulse radar device comprising a memory that includes a first memory and a second memory, each storing a scan vector. The device also includes a clock generator that produces a transmission clock signal and a reception clock signal. The reception clock signal is generated by delaying the transmission clock signal by a clock delay value. Furthermore, the device includes a transmitter that generates a transmission pulse by accepting the transmission clock signal from the clock generator and emits the pulse. Additionally, the device includes a receiver that receives an echo pulse reflected from a target by accepting the reception clock signal from the clock generator. The receiver then calculates the received echo pulse to generate a representative scan vector.

First claim

Opening claim text (preview).

What is claimed is: 1 . A pulse radar device comprising: a memory including a first memory and a second memory each storing one scan vector; a clock generator configured to output a transmission clock signal, and to output a reception clock signal by delaying the transmission clock signal by a clock delay value; a transmitter configured to generate a transmission pulse by accepting the transmission clock signal from the clock generator, and to radiate the transmission pulse; and a receiver configured to receive an echo pulse reflected from a target by accepting the reception clock signal from the clock generator, and to generate a representative scan vector by manipulating the received echo pulse, and wherein the clock delay value is a value between a first minimum clock delay value and a first maximum clock delay value, and wherein the receiver includes: an analog to digital converter configured to convert the received echo pulse into a plurality of digital sample signals; and an operator configured to convert the digital sample signals into representative values at each clock delay value and to generate the representative scan vector from the representative values at the each clock delay value. 2 . The pulse radar device of claim 1 , wherein the operator is configured to: generate a first scan vector from a received echo pulse corresponding to a first scan period, generate a second scan vector from a received echo pulse corresponding to a second scan period, generate a scan vector matrix from the first scan vector and the second scan vector, and generate the representative scan vector by calculating the scan vector matrix. 3 . The pulse radar device of claim 2 , wherein the generated first scan vector is stored in the first memory, wherein the representative scan vector is generated by calculating the first scan vector stored in the first memory and the second scan vector, and wherein the representative scan vector is stored in the second memory. 4 . The pulse radar device of claim 3 , wherein the representative scan vector is generated by adding the first scan vector stored in the first memory and the second scan vector. 5 . The pulse radar device of claim 3 , wherein the representative scan vector is generated by calculating an average between the first scan vector stored in the first memory and the second scan vector. 6 . The pulse radar device of claim 3 , wherein a data transmission notification signal that indicates completion of the operation for generating the representative scan vector is output, to transmit the representative scan vector to an outside. 7 . The pulse radar device of claim 2 , wherein the clock delay value increases from the first minimum clock delay value to the first maximum clock delay value and then changes from the first maximum clock delay value to a second minimum clock delay value, and wherein, when the clock delay value changes to the second minimum clock delay value, a minimum scan distance notification signal is output. 8 . The pulse radar device of claim 7 , wherein the first scan period and the second scan period are periods of the minimum scan distance notification signal. 9 . The pulse radar device of claim 1 , wherein the clock generator includes: a voltage controlled delay line configured to accept a reference clock to output a plurality of clock signals; a phase comparator configured to output a pulse voltage proportional to a phase difference between input signals; a loop filter configured to convert the pulse voltage to a DC voltage and to apply the DC voltage to the voltage controlled delay line; control logic configured to receive a clock selection signal to output a control signal; and a multiplex switch configured to select the transmission clock signal and the reception clock signal from among the plurality of clock signals based on the control signal, and wherein, the voltage controlled delay line, the phase comparator, and the loop filter are configured to form a feedback circuit. 10 . The pulse radar device of claim 1 , wherein the transmitter further includes: a variable oscillation duration generator configured to generate a variable oscillation duration by accepting the transmission clock signal; and a voltage controlled oscillator configured to generate the transmission pulse oscillating during the variable oscillation duration. 11 . The pulse radar device of claim 1 , wherein the receiver further includes: a low noise amplifier configured to receive the echo pulse with low noise; a wideband sampler configured to accept the reception clock signal to sample output signals of the low noise amplifier; and a baseband amplifier configured to amplify signals sampled from the wideband sampler, and wherein the receiver is implemented with an integrated circuit. 12 . An operating method of a pulse radar device including a first memory and a second memory each storing one scan vector, the operating method comprising: radiating a transmission pulse to a target based on a transmission clock signal; receiving an echo pulse reflected from the target based on a reception clock signal obtained by delaying the transmission clock signal by a clock delay value; and generating a representative scan vector by calculating the received echo pulse, and wherein the clock delay value is a value between a minimum clock delay value and a maximum clock delay value, and wherein the generating a representative scan vector by calculating the received echo pulse includes: converting a received echo pulse corresponding to a scan period into a plurality of digital sample signals; converting the plurality of digital sample signals into representative values at each clock delay value; generating at least one scan vector from the representative values at the each clock delay value; and generating the representative scan vector from the at least one scan vector. 13 . The operating method of claim 12 , wherein the generating the representative scan vector from the at least one scan vector includes: generating a scan vector matrix from the at least one scan vector; and generating the representative scan vector by calculating the scan vector matrix. 14 . The operating method of claim 12 , wherein the converting of the plurality of digital sample signals into the representative values at the each clock delay value includes converting the plurality of digital sample signals into the representative values at the each clock delay value based on an accumulated value of digital sample signals corresponding to the same clock delay value. 15 . The operating method of claim 12 , wherein the converting of the plurality of digital sample signals into the representative values at the each clock delay value includes converting the plurality of digital sample signals into the representative values at the each clock delay value based on an average value of digital sample signals corresponding to the same clock delay value. 16 . The operating method of claim 12 , wherein the generating of the representative scan vector by calculating the received echo pulse includes: generating a first scan vector from a received echo pulse corresponding to a first scan period; generating a second scan vector from a received echo pulse corresponding to a second scan period; and generating a first representative scan vector by calculating the first scan vector and the second scan vector, and wherein the first scan vector is stored the first memory, and wherein the first representative scan vector is stored the second memory.

Assignees

Inventors

Classifications

  • G01S7/4065Primary

    involving a delay line · CPC title

  • G01S13/428Primary

    within the pulse scanning systems · CPC title

  • wherein pulse-type signals are transmitted · CPC title

  • Coherent receivers · CPC title

  • Extracting wanted echo-signals · CPC title

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What does patent US2024125911A1 cover?
The present disclosure relates to a pulse radar device comprising a memory that includes a first memory and a second memory, each storing a scan vector. The device also includes a clock generator that produces a transmission clock signal and a reception clock signal. The reception clock signal is generated by delaying the transmission clock signal by a clock delay value. Furthermore, the device…
Who is the assignee on this patent?
Electronics & Telecommunications Res Inst
What technology area does this patent fall under?
Primary CPC classification G01S7/4065. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Apr 18 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).