Sensing and amplifying circuit related to a sensing margin

Patent metadata

Field	Value
Publication number	US-2024120890-A1
Application number	US-202318098576-A
Country	US
Kind code	A1
Filing date	Jan 18, 2023
Priority date	Oct 11, 2022
Publication date	Apr 11, 2024
Grant date	—

Abstract

A sensing and amplifying circuit includes a driving voltage control circuit configured to control a voltage level of a driving voltage based on a surrounding temperature of the sensing and amplifying circuit, a delay control circuit configured to generate a line connection signal and an inverted line connection signal in response to a delay start signal by being supplied with the driving voltage, and a sense amplifier configured to perform a sensing and amplifying operation in response to the line connection signal and the inverted line connection signal. An interval between enable timing of the line connection signal and enable timing of the inverted line connection signal is adjusted as the surrounding temperature changes.

First claim

What is claimed is:

1 . A sensing and amplifying circuit, comprising:
a driving voltage control circuit configured to control a voltage level of a driving voltage based on a surrounding temperature of the sensing and amplifying circuit; a delay control circuit configured to generate a line connection signal and an inverted line connection signal in response to a delay start signal by being supplied with the driving voltage; and a sense amplifier configured to perform a sensing and amplifying operation in response to the line connection signal and the inverted line connection signal, wherein an interval between enable timing of the line connection signal and enable timing of the inverted line connection signal is adjusted as the surrounding temperature changes.

2 . The sensing and amplifying circuit of claim 1 , wherein the driving voltage control circuit is configured to set the voltage level of the driving voltage to be higher as the surrounding temperature becomes higher, and is configured to set the voltage level of the driving voltage to be lower as the surrounding temperature becomes lower.

3 . The sensing and amplifying circuit of claim 1 , wherein the driving voltage control circuit comprises:
a reference voltage generation circuit configured to generate a high temperature reference voltage and a low temperature reference voltage based on a temperature code and the driving voltage; and a driving voltage generation circuit configured to generate the driving voltage based on the temperature code, the high temperature reference voltage, and the low temperature reference voltage.

4 . The sensing and amplifying circuit of claim 3 , wherein the temperature code comprises multiple bits having a logic bit set that corresponds to the surrounding temperature.

5 . The sensing and amplifying circuit of claim 3 , wherein the driving voltage generation circuit comprises:
a selection voltage generation circuit configured to generate a selection voltage based on the temperature code, the high temperature reference voltage, and the low temperature reference voltage; and a driving output circuit configured to output the driving voltage based on the selection voltage by driving the driving voltage.

6 . The sensing and amplifying circuit of claim 5 , wherein the selection voltage generation circuit comprises:
a comparator configured to generate a pre-pull-up signal based on the high temperature reference voltage and a feedback division voltage; a division voltage generation circuit configured to generate at least one division voltage and a feedback division voltage by performing a voltage division operation based on the power supply voltage that is supplied in response to the pre-pull-up signal; a variable resistor connected to the division voltage generation circuit and configured to have a resistance value of the variable resistor adjusted based on the low temperature reference voltage; and a selection voltage generator configured to select one of the at least one division voltage and the feedback division voltage based on the temperature code and configured to output the selected voltage as the selection voltage.

7 . The sensing and amplifying circuit of claim 5 , wherein the driving output circuit comprises:
a comparator configured to generate a pull-up signal based on a feedback voltage and the selection voltage; and a feedback voltage generation circuit configured to generate the feedback voltage by performing a voltage division operation based on a power supply voltage that is supplied in response to the pull-up signal.

8 . The sensing and amplifying circuit of claim 1 , wherein the delay control circuit is configured to set the interval between the enable timing of the line connection signal and the enable timing of the inverted line connection signal to be shorter by being supplied with the driving voltage a voltage level of which is set to a higher voltage level as the surrounding temperature becomes higher.

9 . The sensing and amplifying circuit of claim 1 , wherein the delay control circuit is configured to set the interval between the enable timing of the line connection signal and the enable timing of the inverted line connection signal to be longer by being supplied with the driving voltage a voltage level of which is set to a lower voltage level as the surrounding temperature becomes lower.

10 . The sensing and amplifying circuit of claim 1 , wherein the delay control circuit is configured to identically set the enable timing of the line connection signal and the enable timing of the inverted line connection signal in a preset operation mode.

11 . The sensing and amplifying circuit of claim 10 , wherein the preset operation mode is set as a self-refresh operation.

12 . The sensing and amplifying circuit of claim 1 , wherein the delay control circuit comprises:
a first delay control circuit configured to generate the line connection signal that is enabled at timing that has elapsed by a first delay interval from timing at which the delay start signal is enabled, based on the driving voltage and an operation mode signal; and a second delay control circuit configured to generate the inverted line connection signal that is enabled at timing that has elapsed by a second delay interval from the timing at which the delay start signal is enabled, based on the operation mode signal.

13 . The sensing and amplifying circuit of claim 12 , wherein:
the first delay interval is set to be shorter based on the driving voltage that has a higher voltage level as the surrounding temperature becomes higher, the first delay interval is set to be longer based on the driving voltage that has a lower voltage level as the surrounding temperature becomes lower, and the first delay interval is adjusted as a set interval when the operation mode signal is generated in a preset operation mode.

14 . The sensing and amplifying circuit of claim 12 , wherein the second delay interval is adjusted as a set interval when the operation mode signal is generated in a preset operation mode.

15 . The sensing and amplifying circuit of claim 1 , wherein the sense amplifier is configured to perform a sensing and amplifying operation on data that has been loaded onto the signal line and the inverted signal line, when both the line connection signal and the inverted line connection signal are enabled.

16 . The sensing and amplifying circuit of claim 1 , further comprising a delay start signal generation circuit configured to generate the delay start signal that is enabled at timing that has elapsed by a default interval from timing at which a start signal is enabled.

17 . A sensing and amplifying circuit, comprising:
a first delay control circuit configured to generate a line connection signal that is enabled at timing that has elapsed by a first delay interval from timing at which a delay start signal is enabled, based on a driving voltage and an operation mode signal; a second delay control circuit configured to generate an inverted line connection signal that is enabled at timing that has elapsed by a second delay interval from the timing at which the delay start signal is enabled, based on the operation mode signal; and a sense amplifier configured to perform a sensing and amplifying operation on data that has been loaded onto a signal line and an inverted signal line, when both the line connection signal and the inverted line connection signal are enabled.

18 . The sensing and amplifying circuit of claim 17 , wherein:
the first delay int

Assignees

• Sk Hynix Inc

Inventors

• Jang Yeonsu
• Kim Woongrae
• Yoon Jung Min

Classifications

• G11C7/22

  Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management · CPC title

• G11C7/04

  with means for avoiding disturbances due to temperature effects · CPC title

• G11C7/06 Primary

  Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits} · CPC title

• H03F3/04 Primary

  with semiconductor devices only · CPC title

• H03K5/24 Primary

  the characteristic being amplitude · CPC title