Semiconductor bridge and the method of the same

Patent metadata

Field	Value
Publication number	US-2024114792-A1
Application number	US-202217956023-A
Country	US
Kind code	A1
Filing date	Sep 29, 2022
Priority date	Sep 29, 2022
Publication date	Apr 4, 2024
Grant date	—

Abstract

A detonator for an explosive material is described. The detonator includes a semiconductor bridge, coupled with the explosive material, including thermal feedback mechanism is provided via one or more thermistors. An exemplary mechanism includes a semiconductor bridge with a polysilicon resistor and a pair of thermistors. The two thermistors are disposed to be substantially close to or sandwich the polysilicon resistor. When the temperature surrounding the polysilicon resistor is getting upwards, the temperature surrounding the thermistors is equally going up. When the temperature reaches a critical point, but below the threshold of the polysilicon resistor, the resistance of the thermistors drops suddenly or drastically, causing the current driving up the temperature of the polysilicon resistor to divert through the VOX temp resistors. Subsequently the current going through the polysilicon resistor is reduced, causing the temperature to drop downwards.

First claim

We claim:

1 . A detonator for an explosive material, comprising:
a semiconductor bridge, coupled with the explosive material, including:
a polysilicon resistor, wherein the polysilicon resistor is coupled with or in contact to the explosive material, a current flow throughout the polysilicon resistor generates heat, the heat is accumulated over time and ignite the explosive material when the heat exceeds a threshold for the polysilicon resistor;
one or more thermistors disposed in parallel next to the polysilicon resistor and sensing the heat, resistance of the thermistors drops drastically when the heat exceeds a threshold for the thermistors, wherein the current flow is diverted from the polysilicon resistor to the thermistors so as to reduce the heat being generated in the polysilicon resistor, the threshold for the thermistors is lower than the threshold for the polysilicon resistor.

2 . The detonator as recited in claim 1 , further comprising:
an insulate layer, where the polysilicon resistor and the thermistors are arranged on top of the insulating layer and isolated from each other.

3 . The detonator as recited in claim 2 , further comprising:
a non-conducting substrate, where the insulate layer is arranged or formed on top of the non-conducting substrate.

4 . The detonator as recited in claim 3 , wherein the polysilicon resistor is a doped polysilicon or silicon layer formed on the non-conducting substrate.

5 . The detonator as recited in claim 4 , wherein the polysilicon resistor is formed between two spaced conductive pads.

6 . The detonator as recited in claim 2 , wherein the polysilicon resistor and the thermistors are precisely arranged in parallel across two spaced conductive pads.

7 . The detonator as recited in claim 6 , wherein the polysilicon resistor, the thermistors and the two spaced conductive pads form a parallel resistor circuit.

8 . The detonator as recited in claim 6 , wherein the two spaced conductive pads are made to spread over terminals of the polysilicon resistor and the thermistors.

9 . The detonator as recited in claim 8 , wherein some or all of the two spaced conductive pads and the substrate provide heat coupling between the polysilicon resistor and the thermistors.

10 . The detonator as recited in claim 1 , wherein the one or more thermistors are at least one pair, disposed evenly around the polysilicon resistor.

11 . A method of a detonator for an explosive material, comprising:
providing a semiconductor bridge to couple with the explosive material, the semiconductor bridge including: a polysilicon resistor and one or more thermistors disposed in parallel next to the polysilicon resistor; coupling the polysilicon resistor with the explosive material, wherein a current flow throughout the polysilicon resistor generates heat, the heat is accumulated over time and ignite the explosive material when the heat exceeds a threshold for the polysilicon resistor; dropping resistance of each of the thermistors drastically when the heat exceeds a threshold for the thermistors, wherein the current flow is diverted from the polysilicon resistor to the thermistors so as to reduce the heat being generated in the polysilicon resistor, the threshold for the thermistors is lower than the threshold for the polysilicon resistor.

12 . The method as recited in claim 11 , further comprising:
providing an insulate layer, wherein the polysilicon resistor and the thermistors are arranged on top of the insulating layer and isolated from each other.

13 . The method as recited in claim 12 , further comprising:
providing a non-conducting substrate, wherein the insulate layer is arranged or formed on top of the non-conducting substrate.

14 . The method as recited in claim 13 , wherein the polysilicon resistor is a doped polysilicon or silicon layer formed on the non-conducting substrate.

15 . The method as recited in claim 14 , wherein the polysilicon resistor is formed between two spaced conductive pads.

16 . The method as recited in claim 12 , wherein the polysilicon resistor and the thermistors are precisely arranged in parallel across two spaced conductive pads.

17 . The detonate as recited in claim 16 , wherein the polysilicon resistor, the thermistors and the two spaced conductive pads form a parallel resistor circuit.

18 . The method as recited in claim 16 , wherein the two spaced conductive pads are made to spread over terminals of the polysilicon resistor and the thermistors.

19 . The method as recited in claim 18 , wherein some or all of the two spaced conductive pads and the substrate provide heat coupling between the polysilicon resistor and the thermistors.

20 . The method as recited in claim 11 , wherein the one or more thermistors are at least one pair, disposed evenly around the polysilicon resistor.

Assignees

• Univ Hangzhou Dianzi

Inventors

• Luo Jianjun
• Feng Chunyang

Classifications

• H10D84/209

  of only resistors · CPC title

• H10D86/85

  characterised by only passive components · CPC title

• H10D1/47

  Resistors having no potential barriers · CPC title

• H01L27/16 Primary

  Electricity · mapped topic

• F42B3/13

  with semiconductive bridge · CPC title