Connecting circuit and communication interface

Patent metadata

Field	Value
Publication number	US-2024097948-A1
Application number	US-202218551660-A
Country	US
Kind code	A1
Filing date	Mar 25, 2022
Priority date	Mar 25, 2021
Publication date	Mar 21, 2024
Grant date	—

Abstract

An embodiment is a connecting circuit connected to the preceding stage of a transmission circuit and configured to receive a data signal includes an initial voltage value holding circuit, and a terminating load connected in series with the initial voltage value holding circuit. The initial voltage value holding circuit outputs, to the terminating load, an initial voltage value obtained when no data signal is input, and sets both ends of the terminating load at the same potential by a DC component.

First claim

1 .- 8 . (canceled)

9 . A connecting circuit connected to a preceding stage of a transmission circuit to which a data signal is input, the connecting circuit comprising:
an initial voltage value holding circuit; and a terminating load connected in series with the initial voltage value holding circuit, wherein the initial voltage value holding circuit outputs, to the terminating load, an initial voltage value obtained when the data signal is not input, and sets both ends of the terminating load at the same potential by a DC component.

10 . The connecting circuit according to claim 9 , wherein the initial voltage value holding circuit includes:
a frame detection circuit configured to detect input of the data signal and output a frame detection signal; a signal delay circuit configured to delay the data signal; a sample-and-hold circuit configured to detect the initial voltage value obtained when the data signal is not input, hold the initial voltage value in response to the input of the frame detection signal, and output the initial voltage value; and a voltage maintenance circuit configured to output the initial voltage value to the terminating load.

11 . The connecting circuit according to claim 9 , wherein the terminating load includes a plurality of terminating loads.

12 . A connecting circuit comprising:
a frame detection circuit; a signal delay circuit connected in parallel with the frame detection circuit; a sample-and-hold circuit configure to receive an output of the signal delay circuit, the sample-and-hold circuit receiving an output of the frame detection circuit; a voltage maintenance circuit configure to receive an output of the sample-and-hold circuit; and a terminating load to which an output of the voltage maintenance circuit is applied, wherein the sample-and-hold circuit holds and outputs the output of the signal delay circuit in response to the output of the frame detection circuit.

13 . A connecting circuit connected to a preceding stage of a plurality of transmission circuits, the connecting circuit comprising:
an inter-channel interpolation bias detection circuit configure to detect a signal of a low voltage among a plurality of input data signals; a voltage maintenance circuit configure to receive an output of the inter-channel interpolation bias detection circuit; and a plurality of terminating loads to which an output of the voltage maintenance circuit is applied.

14 . The connecting circuit according to claim 13 , wherein the inter-channel interpolation bias detection circuit includes
a plurality of diode circuits, and a voltage source connected to an input of the voltage maintenance circuit via a resistor, wherein each of the plurality of data signals is input to one end of each of the plurality of diode circuits, and the other end of each of plurality of diode circuits is connected to the input of the voltage maintenance circuit.

15 . The connecting circuit according to claim 14 , wherein when a signal of a low voltage is input to one diode circuit among the plurality of diode circuits, the inter-channel interpolation bias detection circuit outputs the signal of the low voltage to the voltage maintenance circuit.

16 . A communication interface comprising a connecting circuit according to claim 9 .

17 . The connecting circuit according to claim 10 , wherein the terminating load includes a plurality of terminating loads.

18 . The connecting circuit according to claim 12 , wherein the terminating load includes a plurality of terminating loads.

19 . A communication interface comprising a connecting circuit according to claim 10 .

20 . A communication interface comprising a connecting circuit according to claim 11 .

21 . A communication interface comprising a connecting circuit according to claim 12 .

22 . A communication interface comprising a connecting circuit according to claim 13 .

23 . A communication interface comprising a connecting circuit according to claim 14 .

24 . A communication interface comprising a connecting circuit according to claim 15 .

Assignees

• Nippon Telegraph & Telephone
• Ntt Innovative Devices Corp

Inventors

• Minotani Tadashi
• Kishi Toshiki
• Tobayashi Masatoshi
• Urabe Yoshikazu

Classifications

• H04L25/02

  Details {; arrangements for supplying electrical power along data transmission lines (systems for transmitting signals via power distribution lines H04B3/54)} · CPC title

• H04L7/0029

  interpolation of received data signal · CPC title

• H04L7/0041

  Delay of data signal · CPC title

• H04L7/0075

  with photonic or optical means · CPC title

• H04L25/06 Primary

  DC level restoring means; Bias distortion correction {; Decision circuits providing symbol by symbol detection} · CPC title