Display backplane, method for manufacturing the same, and display apparatus

Patent metadata

Field	Value
Publication number	US-2024090295-A1
Application number	US-202118271455-A
Country	US
Kind code	A1
Filing date	Oct 22, 2021
Priority date	Mar 25, 2021
Publication date	Mar 14, 2024
Grant date	—

Abstract

A display backboard includes a base substrate and a plurality of real pixel units periodically arranged on one side of the base substrate. Each real pixel unit has a plurality of real light-emitting layers with different colors, at least two real metal wiring layers are provided on one side of each real light-emitting layer proximal to the base substrate, and two real metal wiring layers on the side of each real light-emitting layer are electrically connected through via holes. Orthographic projections of the two real metal wiring layers on the side of each real light-emitting layer on the base substrate cover an orthographic projection of at least one of the via holes on the base substrate, and the via holes are configured to connect two virtual metal wiring layers in a virtual pixel unit different from the real pixel unit.

First claim

1 . A display backplane, comprising a base substrate and a plurality of real pixel units periodically arranged on one side of the base substrate,
wherein each of the plurality of real pixel units has a plurality of real light-emitting layers with different colors, at least two real metal wiring layers are provided on one side of each of the plurality of real light-emitting layers proximal to the base substrate, and two real metal wiring layers on the side of each of the plurality of real light-emitting layers are electrically connected through via holes; and orthographic projections of the two real metal wiring layers on the side of each of the plurality of real light-emitting layers on the base substrate cover an orthographic projection of at least one of the via holes on the base substrate, and the via holes are configured to connect two virtual metal wiring layers in a virtual pixel unit different from the real pixel unit.

2 . The display backplane according to claim 1 , wherein the orthographic projections of the two real metal wiring layers on the side of each of the plurality of real light-emitting layers on the base substrate cover orthographic projections of two of the via holes on the base substrate.

3 . The display backplane according to claim 1 , wherein one real metal wiring layer on the side of each of the plurality of real light-emitting layers proximal to the base substrate is an anode of the each of the plurality of real light-emitting layers.

4 . The display backplane according to claim 1 , wherein each virtual pixel unit has a plurality of virtual light-emitting layers with different colors, and an overlapping region exists between an orthographic projection of each of the plurality of real light-emitting layers on the base substrate and an orthographic projection of one of the plurality of virtual light-emitting layers on the base substrate, and orthographic projections of the via holes on the base substrate are in the overlapping region.

5 . The display backplane according to claim 4 , wherein the plurality of real light-emitting layers in each real pixel unit comprise at least one first color real light-emitting layer, at least one second color real light-emitting layer and at least one third color real light-emitting layer, and the plurality of virtual light-emitting layers in each virtual pixel unit comprise at least one first color virtual light-emitting layer, at least one second color virtual light-emitting layer and at least one third color virtual light-emitting layer;
a first overlapping region exists between an orthographic projection of the at least one first color real light-emitting layer on the base substrate and an orthographic projection of the at least one first color virtual light-emitting layer on the base substrate; a second overlapping region exists between an orthographic projection of the at least one second color real light-emitting layer on the base substrate and an orthographic projection of the at least one second color virtual light-emitting layer on the base substrate; a third overlapping region exists between an orthographic projection of the at least one third color real light-emitting layer on the base substrate and an orthographic projection of the at least one third color virtual light-emitting layer on the base substrate; and the orthographic projections of the via holes on the base substrate are in the first overlapping region, the second overlapping region and the third overlapping region.

6 . The display backplane according to claim 5 , wherein the plurality of virtual light-emitting layers in each virtual pixel unit comprise two third color virtual light-emitting layers, the third overlapping region exists between an orthographic projection of the third color real light-emitting layer on the base substrate and an orthographic projection of one third color virtual light-emitting layer on the base substrate, no third overlapping region exists between the orthographic projection of the third color real light-emitting layer on the base substrate and an orthographic projection of the other third color virtual light-emitting layer on the base substrate, and the two third color virtual light-emitting layers share the same anode.

7 . The display backplane according to claim 1 , wherein an anode is provided on a surface of each of the plurality of real light-emitting layers proximal to the base substrate, a first real metal wiring layer is provided on one side of each anode proximal to the base substrate, a second real metal wiring layer is provided on one side of each first real metal wiring layer proximal to the base substrate, the via holes comprise a first via hole and a second via hole, each anode and each first real metal wiring layer are electrically connected through the first via hole, and each first real metal wiring layer and each second real metal wiring layer are electrically connected through the second via hole;
an orthographic projection of each anode on the base substrate and an orthographic projection of each first real metal wiring layer on the base substrate cover an orthographic projection of at least one first via hole on the base substrate; and an orthographic projection of each first real metal wiring layer on the base substrate and an orthographic projection of each second real metal wiring layer on the base substrate cover an orthographic projection of at least one second via hole on the base substrate.

8 . The display backplane according to claim 1 , wherein one of the real pixel unit and the virtual pixel unit is in a Delta pixel arrangement, and the other of the real pixel unit and the virtual pixel unit is in an RBBG pixel arrangement.

9 . The display backplane according to claim 8 , wherein in the Delta pixel arrangement, a shape of the plurality of real light-emitting layers is a hexagon, an angle of an inner angle of the hexagon is 120 degrees, a pixel center distance is 6.3 μm, a pixel width W is 6.3 μm, a pixel height L is 6.3 μm, and a size of each sub-pixel is 4.2 μm×3.15 μm.

10 . The display backplane according to claim 8 , wherein in the RBBG pixel arrangement, a shape of the plurality of real light-emitting layers is a rectangle, a pixel center distance is 6.3 μm, a pixel width W is 6.3 μm, a pixel height L is 6.3 μm, and a size of each sub-pixel is 3.15 μm×3.15 μm.

11 . A method for manufacturing the display backplane according to claim 1 , comprising:
forming at least two real metal wiring layers on one side of a base substrate, and electrically connecting two real metal wiring layers through via holes; and forming a plurality of real pixel units periodically arranged on one side of the at least two real metal wiring layers distal from the base substrate; wherein each of the plurality of real pixel units has a plurality of real light-emitting layers with different colors, orthographic projections of the two real metal wiring layers on one side of each of the plurality of real light-emitting layers proximal to the base substrate on the base substrate cover an orthographic projection of at least one via hole on the base substrate, and the via holes are configured to connect two virtual metal wiring layers in a virtual pixel unit different from the real pixel unit.

12 . A display apparatus, comprising the display backplane according to claim 1 .

13 . The display backplane according to claim 2 , wherein one real metal wiring layer on the side of each of the plurality of real light-emitting layers proximal to the base substrate is an anode of the each of the plurality of real light-emitting layers.

14 . The display backplane according to claim

Assignees

• Yunnan Invensight Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Wei Junbo
• Zhu Zhijian
• Yang Shengji
• Lu Pengcheng
• Huang Kuanta
• Tian Yuanlan

Classifications

• H10K59/353 Primary

  characterised by the geometrical arrangement of the RGB subpixels · CPC title

• H10K59/1201 Primary

  Manufacture or treatment · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/351

  comprising more than three subpixels, e.g. red-green-blue-white [RGBW] · CPC title

• H10K59/121

  characterised by the geometry or disposition of pixel elements · CPC title