Display device

US2024087535A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024087535-A1
Application numberUS-201917766826-A
CountryUS
Kind codeA1
Filing dateOct 11, 2019
Priority dateOct 11, 2019
Publication dateMar 14, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes: in a display region, a first scanning control line, a light emission control line, a data signal line, a pixel circuit provided at an intersection of the first scanning control line and the data signal line, and a light-emitting element provided for each of the pixel circuits; and in a non-display region, a first scanning control circuit and a light emission control circuit, wherein each of the pixel circuits includes a drive transistor, a write transistor, and a capacitor, the drive transistor including a first control terminal and a second control terminal positioned above and below a semiconductor layer, the light emission control circuit outputs, to the light emission control line, a light emission control signal that switches between a select state in which the drive transistor is turned on and a non-select state in which the drive transistor is turned off.

First claim

Opening claim text (preview).

1 : A display device comprising: in a display region, a first scanning control line, a light emission control line extending parallel to the first scanning control line, a data signal line intersecting the first scanning control line, a pixel circuit provided at an intersection of the first scanning control line and the data signal line, and a light-emitting element provided for each of the pixel circuits; and in a non-display region, a first scanning control circuit configured to drive the first scanning control line and a light emission control circuit configured to drive the light emission control line, wherein each of the pixel circuits includes a drive transistor, a write transistor, and a capacitor configured to hold a data signal, the drive transistor including a first control terminal and a second control terminal positioned above and below a semiconductor layer with the semiconductor layer interposed between the first and second control terminals, the drive transistor configured to cause a drive current to flow to the light-emitting element, the write transistor includes a first conduction terminal connected to the data signal line, a second conduction terminal connected to the first control terminal of the drive transistor, and a control terminal connected to the first scanning control line, the drive transistor includes the second control terminal connected to the light emission control line, and the light emission control circuit outputs, to the light emission control line, a light emission control signal that switches between a select state in which the drive transistor is turned on and a non-select state in which the drive transistor is turned off. 2 : The display device according to claim 1 , wherein a low voltage of the light emission control line satisfies a relationship VL ≤−max Vd/κ, in which VL represents the low voltage, maxVd represents a voltage of a data signal for maximum luminance of the data signal line, and κ represents a positive coefficient indicating a degree to which a drive threshold changes according to a voltage of the light emission control line. 3 : The display device according to claim 1 , wherein, in a write period of the data signal with respect to the capacitor, the first scanning control circuit sets the first scanning control line to be in a select state to turn on the write transistor, and the light emission control circuit sets the light emission control line to be in the select state to turn on the drive transistor, and in a period from the write period to a light emission period, the first scanning control circuit sets the first scanning control line to be in a non-select state to turn off the write transistor, and maintains the light emission control line in the select state to keep the drive transistor on. 4 : The display device according to claim 1 , wherein the light emission control circuit sets the light emission control line to be in the select state two or more times in one vertical period. 5 : The display device according to claim 1 , further comprising: a still image display mode; and a moving image display mode, wherein, in the still image display mode, the light emission control circuit sets the light emission control line to be in the select state one time in one vertical period, and in the moving image display mode, the light emission control circuit sets the light emission control line to be in the select state two or more times in the one vertical period. 6 : The display device according to claim 1 , further comprising: a first mode; and a second mode in which luminance is lower than in the first mode, wherein a period in which the light emission control line is in the select state in the second mode is shorter than a period in which the light emission control line is in the select state in the first mode. 7 : The display device according to claim 1 , wherein the display region includes an initialization power supply line and a second scanning control line extending parallel to the first scanning control line, and the non-display region includes a second scanning control circuit configured to drive the second scanning control line, the pixel circuit includes an initialization transistor, the initialization transistor including a first conduction terminal connected to the initialization power supply line, a second conduction terminal connected to a conduction terminal of the drive transistor on the light-emitting element side, and a control terminal connected to the second scanning control line, and a first counter electrode of the capacitor is connected to the first control terminal of the drive transistor, and a second counter electrode of the capacitor is connected to the second conduction terminal of the initialization transistor. 8 : The display device according to claim 1 , wherein the display region includes an initialization power supply line and a second scanning control line extending parallel to the first scanning control line, and the non-display region includes a second scanning control circuit configured to drive the second scanning control line, the pixel circuit includes an initialization transistor, the initialization transistor including a first conduction terminal connected to the initialization power supply line, a second conduction terminal connected to a conduction terminal of the drive transistor on the light-emitting element side, and a control terminal connected to the second scanning control line, and a first counter electrode of the capacitor is connected to the first control terminal of the drive transistor, and a second counter electrode of the capacitor is connected to the second conduction terminal of the initialization transistor. 9 : The display device according to claim 8 , wherein, in a period before a write period of the data signal with respect to the capacitor, the second scanning control circuit sets the second scanning control line to be in a select state to turn on the initialization transistor, and an initialization voltage of the initialization power supply line is applied to the second counter electrode of the capacitor, in the write period of the data signal with respect to the capacitor, the first scanning control circuit sets the first scanning control line to be in a select state to turn on the write transistor, the second scanning control circuit sets the second scanning control line to be in a non-select state to turn off the initialization transistor, and the light emission control circuit sets the light emission control line to be in the non-select state to turn off the drive transistor, and the data signal is applied to the first counter electrode of the capacitor, and in a period from the write period to a light emission period, the first scanning control circuit maintains the first scanning control line in a non-select state to keep the write transistor off, the second scanning control circuit maintains the non-select state of the second scanning control line to keep the initialization transistor off, and the light emission control circuit sets the light emission control line to be in the select state to turn on the drive transistor. 10 : The display device according to claim 8 , wherein, in a write period of the data signal with respect to the capacitor, the first scanning control circuit sets the first scanning control line to be in a select state to turn on the write transistor, the second scanning control circuit sets the second scanning control line to be in a select state to turn on the initialization transistor, and the light emission control circuit sets the light emission control line to be in the select state to turn on the drive t

Assignees

Inventors

Classifications

  • G09G3/3266Primary

    Details of drivers for scan electrodes · CPC title

  • G09G3/3233Primary

    with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Details of drivers for data electrodes · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • Reduction of after-image effects · CPC title

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What does patent US2024087535A1 cover?
A display device includes: in a display region, a first scanning control line, a light emission control line, a data signal line, a pixel circuit provided at an intersection of the first scanning control line and the data signal line, and a light-emitting element provided for each of the pixel circuits; and in a non-display region, a first scanning control circuit and a light emission control c…
Who is the assignee on this patent?
Sharp Kk
What technology area does this patent fall under?
Primary CPC classification G09G3/3266. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Mar 14 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).