Spatial resolution and simultaneous multiple single photon detection using superconducting structured parallel nanowires
US-2019051699-A1 · Feb 14, 2019 · US
US2024080029A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024080029-A1 |
| Application number | US-202318387402-A |
| Country | US |
| Kind code | A1 |
| Filing date | Nov 6, 2023 |
| Priority date | Feb 14, 2018 |
| Publication date | Mar 7, 2024 |
| Grant date | — |
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A programmable circuit includes a superconducting multi-dimensional array. The programmable circuit further includes a plurality of photon detectors coupled to respective portions of the superconducting multi-dimensional array, each photon detector configured to selectively provide input to a corresponding respective portion sufficient to transition the corresponding respective portion from a superconducting state to a non-superconducting state. The programmable circuit also includes one or more electrical terminals coupled to respective second portions of the superconducting multi-dimensional array.
Opening claim text (preview).
What is claimed is: 1 . A programmable circuit, comprising: a superconducting multi-dimensional array; a plurality of photon detectors coupled to respective portions of the superconducting multi-dimensional array, each photon detector configured to selectively provide input to a corresponding respective portion sufficient to transition the corresponding respective portion from a superconducting state to a non-superconducting state; and one or more electrical terminals coupled to respective second portions of the superconducting multi-dimensional array. 2 . The programmable circuit of claim 1 , wherein in a first configuration, the superconducting multi-dimensional array is configured to perform a logical operation. 3 . The programmable circuit of claim 2 , wherein in a second configuration, the superconducting multi-dimensional array is configured to perform an additional logical operation that is different from the logical operation of the first configuration. 4 . The programmable circuit of claim 3 , wherein the logical operation comprises one or more of: a logical AND operation; a logical OR operation; a majority gate operation; and an input counting operation. 5 . The programmable circuit of claim 1 , wherein the superconducting multi-dimensional array is a two-dimensional array. 6 . The programmable circuit of claim 1 , wherein the superconducting multi-dimensional array is patterned from a single thin film of superconducting material. 7 . The programmable circuit of claim 1 , further comprising a current source coupled to the superconducting multi-dimensional array, the current source configured to provide a current to the superconducting multi-dimensional array. 8 . The programmable circuit of claim 7 , wherein the current is adapted to maintain the superconducting multi-dimensional array in a superconducting state in the absence of a signal from the plurality of photon detectors. 9 . The programmable circuit of claim 7 , wherein the current source is further configured to reset the superconducting multi-dimensional array after the superconducting multi-dimensional array transitions to a non-superconducting state. 10 . The programmable circuit of claim 1 , wherein the plurality of photon detectors is electrically isolated from the superconducting multi-dimensional array. 11 . The programmable circuit of claim 10 , wherein the plurality of photon detectors are positioned adjacent to the respective portions of the superconducting multi-dimensional array. 12 . The programmable circuit of claim 1 , further comprising a readout circuit coupled to one of the one or more electrical terminals. 13 . The programmable circuit of claim 1 , further comprising a plurality of input components coupled to respective third portions of the superconducting multi-dimensional array, the plurality of input components configured to maintain the respective third portions in one or more steady states. 14 . The programmable circuit of claim 13 , wherein the plurality of input components comprise a plurality of semiconductor components. 15 . The programmable circuit of claim 1 , further comprising one or more reference nodes coupled to the one or more electrical terminals. 16 . The programmable circuit of claim 1 , wherein the respective portions of the superconducting multi-dimensional array each have a width ranging from 50 nanometers to 5 microns. 17 . The programmable circuit of claim 1 , wherein the respective portions of the superconducting multi-dimensional array each have a length ranging from 200 nanometers to 2 microns. 18 . The programmable circuit of claim 1 , wherein the superconducting multi-dimensional array includes a first number of columns and a second number of rows, wherein the first number is different than the second number. 19 . The programmable circuit of claim 1 , wherein a first set of columns of the superconducting multi-dimensional array have a first number of rows, and a second set of columns of the superconducting multi-dimensional array have a second number of rows, different from the first number.
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