Solid-state imaging element and imaging device

US2024072093A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024072093-A1
Application numberUS-202118259590-A
CountryUS
Kind codeA1
Filing dateDec 20, 2021
Priority dateJan 6, 2021
Publication dateFeb 29, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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A solid-state imaging element ( 200 ) according to the present disclosure includes a light receiving substrate ( 201 ) and a circuit board ( 202 ). The light receiving substrate ( 201 ) includes a plurality of light receiving circuits ( 211 ) in which photoelectric conversion elements are provided. The circuit board ( 202 ) is bonded to the light receiving substrate ( 201 ) and includes a plurality of address event detection circuits ( 231 ) that respectively detects voltage changes output from the photoelectric conversion elements of the plurality of light receiving circuits ( 211 ). The circuit board ( 202 ) includes a first element region ( 501 ) and a second element region ( 502 ). In the first element region ( 501 ), a first transistor (T 1 ) driven by a first voltage (VDD 1 ) is arranged. In the second element region ( 502 ), a second transistor (T 2 ) driven by a second voltage (VDD 2 ) lower than the first voltage (VDD 1 ) is arranged. A full trench isolation (FTI) structure ( 521 ) is arranged between the first element region ( 501 ) and the second element region ( 502 ) adjacent to each other.

First claim

Opening claim text (preview).

1 . A solid-state imaging element comprising: a light receiving substrate including a plurality of light receiving circuits provided with photoelectric conversion elements; and a circuit board that is bonded to the light receiving substrate and includes a plurality of address event detection circuits that respectively detects voltage changes output from the photoelectric conversion elements of the plurality of light receiving circuits, wherein the circuit board includes a first element region in which a first transistor driven by a first voltage is arranged, and a second element region in which a second transistor driven by a second voltage lower than the first voltage is arranged, and a full trench isolation (FTI) structure is arranged between the first element region and the second element region adjacent to each other. 2 . The solid-state imaging element according to claim 1 , wherein an end portion on an opposite side of a light incident side of the FTI structure is in contact with an insulating layer. 3 . The solid-state imaging element according to claim 2 , wherein a part of the end portion on the opposite side of the light incident side of the FTI structure is in contact with the insulating layer. 4 . The solid-state imaging element according to claim 1 , wherein an end portion on an opposite side of a light incident side of the FTI structure is in contact with a well layer of a conductivity type different from that of a first well region located in the first element region. 5 . The solid-state imaging element according to claim 4 , wherein a part of the end portion on the opposite side of the light incident side of the FTI structure is in contact with the well layer. 6 . The solid-state imaging element according to claim 1 , wherein wiring lines of the light receiving substrate and the circuit board are directly bonded to each other. 7 . The solid-state imaging element according to claim 1 , wherein wiring lines of the light receiving substrate and the circuit board are connected to each other by a via. 8 . The solid-state imaging element according to claim 1 , wherein the second element region includes a second well region of a first conductivity type and a third well region of a second conductivity type, and another FTI structure is arranged between the second well region and the third well region adjacent to each other. 9 . An imaging device comprising: a lens; a solid-state imaging element; and a control unit that controls the solid-state imaging element, wherein the solid-state imaging element includes a light receiving substrate including a plurality of light receiving circuits provided with photoelectric conversion elements, a circuit board that is bonded to the light receiving substrate and includes a plurality of address event detection circuits that respectively detects voltage changes output from the photoelectric conversion elements of the plurality of light receiving circuits, and a signal processing unit that performs signal processing on an output of the solid-state imaging element, the circuit board includes a first element region in which a first transistor driven by a first voltage is arranged, and a second element region in which a second transistor driven by a second voltage lower than the first voltage is arranged, and a full trench isolation (FTI) structure is arranged between the first element region and the second element region adjacent to each other.

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What does patent US2024072093A1 cover?
A solid-state imaging element ( 200 ) according to the present disclosure includes a light receiving substrate ( 201 ) and a circuit board ( 202 ). The light receiving substrate ( 201 ) includes a plurality of light receiving circuits ( 211 ) in which photoelectric conversion elements are provided. The circuit board ( 202 ) is bonded to the light receiving substrate ( 201 ) and includes a plura…
Who is the assignee on this patent?
Sony Semiconductor Solutions Corp
What technology area does this patent fall under?
Primary CPC classification H10F39/8063. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 29 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).