Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US2024072015A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2024072015-A1 |
| Application number | US-202318234296-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 15, 2023 |
| Priority date | Aug 26, 2022 |
| Publication date | Feb 29, 2024 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A display panel includes a substrate including first and second areas spaced apart from each other, and a first display area surrounding the first area and the second area, a plurality of first light-emitting diodes in the first display area and respectively electrically connected to a plurality of first sub-pixel circuits, a plurality of second light-emitting diodes in the first area, a plurality of second sub-pixel circuits respectively electrically connected to the plurality of second light-emitting diodes, and a groove surrounding the second area and having an undercut shape, wherein the substrate includes a first base layer, a first barrier layer, a second base layer, and a second barrier layer, and further includes a concave portion in a region between two adjacent second light-emitting and recessed into the second barrier layer and the second base layer, and a hole in the second area and penetrating through the substrate.
Opening claim text (preview).
What is claimed is: 1 . A display panel comprising: a substrate comprising a first area, a second area spaced apart from the first area, and a first display area surrounding the first area and the second area; a plurality of first sub-pixel circuits in the first display area; a plurality of first light-emitting diodes in the first display area and respectively electrically connected to the plurality of first sub-pixel circuits; a plurality of second light-emitting diodes in the first area; a plurality of second sub-pixel circuits respectively electrically connected to the plurality of second light-emitting diodes; and a groove surrounding the second area and having an undercut shape, wherein the substrate comprises a first base layer, a first barrier layer on the first base layer, a second base layer on the first barrier layer, and a second barrier layer on the second base layer, wherein the substrate further comprises: a first concave portion corresponding to a region between two adjacent second light-emitting diodes in the first area and having a shape recessed into the second barrier layer and the second base layer; and a hole corresponding to the second area and penetrating through the second barrier layer, the second base layer, the first barrier layer, and the first base layer. 2 . The display panel of claim 1 , wherein a first vertical distance from an upper surface of the first base layer to a bottom surface of the groove is equal to or greater than a second vertical distance from the upper surface of the first base layer to a bottom surface of the first concave portion. 3 . The display panel of claim 1 , wherein the first area comprises a transmission area corresponding to the first concave portion of the substrate. 4 . The display panel of claim 1 , wherein one of two second sub-pixel circuits selected from among the plurality of second sub-pixel circuits is in a first peripheral area on a first side of the first area, and another one of the two second sub-pixel circuits is in a second peripheral area on a second side of the first area, the second side being opposite to the first side. 5 . The display panel of claim 4 , wherein the one of the two second sub-pixel circuits is on a side opposite to the second area with the first area therebetween, and the other one of the two second sub-pixel circuits is between the first area and the second area. 6 . The display panel of claim 4 , further comprising: a first conductive bus line electrically connecting the one of the two second sub-pixel circuits and a corresponding second light-emitting diode from among the plurality of second light-emitting diodes to each other and extending in a first direction; and a second conductive bus line electrically connecting the other one of the two second sub-pixel circuits and a corresponding second light-emitting diode from among the plurality of second light-emitting diodes to each other and extending in the first direction. 7 . The display panel of claim 6 , wherein each of the first conductive bus line and the second conductive bus line comprises a transmissive conductive material. 8 . The display panel of claim 7 , wherein a portion of any one of the first conductive bus line and the second conductive bus line overlaps the first concave portion. 9 . The display panel of claim 1 , wherein a first height from the substrate to a first electrode of any one of the plurality of second light-emitting diodes in the first area is less than a second height from the substrate to a first electrode of any one of the plurality of first light-emitting diodes in the first display area. 10 . The display panel of claim 1 , further comprising an organic insulating layer between the substrate and a first electrode of any one of the plurality of second light-emitting diodes in the first area, wherein the organic insulating layer overlaps the first concave portion of the substrate. 11 . The display panel of claim 1 , wherein the substrate further comprises a second concave portion in the first area and spaced apart from the first concave portion. 12 . A method of manufacturing a display panel, the display panel comprising: a first display area in which a plurality of first light-emitting diodes is arranged; a first area in which a plurality of second light-emitting diodes is arranged; and a second area spaced apart from the first area, the method comprising: preparing a substrate comprising a first base layer, a first barrier layer on the first base layer, a second base layer on the first barrier layer, and a second barrier layer on the second base layer, wherein the plurality of first light-emitting diodes and the plurality of second light-emitting diodes are on the substrate; forming a groove corresponding to a peripheral area of the second area, surrounding the second area, and having an undercut shape; and forming a concave portion corresponding to a region between two adjacent second light-emitting diodes in the first area and having a shape recessed into the second barrier layer and the second base layer, wherein, in the forming of the groove and the forming of the concave portion, a mask made of a same material is used. 13 . The method of claim 12 , wherein the mask comprises indium gallium zinc oxide (IGZO). 14 . The method of claim 12 , wherein a first vertical distance from an upper surface of the first base layer to a bottom surface of the groove is equal to or greater than a second vertical distance from the upper surface of the first base layer to a bottom surface of the concave portion. 15 . The method of claim 12 , wherein the forming of the concave portion comprises: forming a hole penetrating through the second barrier layer; and forming an opening overlapping the hole of the second barrier layer in the second base layer. 16 . The method of claim 15 , further comprising: forming an organic insulating layer between the substrate and the mask; and forming a metal pattern layer on the organic insulating layer, wherein the forming of the groove comprises removing a portion of the organic insulating layer by using the mask, and the metal pattern layer comprises a tip protruding toward the groove from a point where an inner side surface of the organic insulating layer, from which a portion thereof is removed, and a bottom surface of the metal pattern layer meet each other. 17 . The method of claim 16 , further comprising forming a lower layer below the organic insulating layer. 18 . The method of claim 15 , wherein the forming of the groove comprises: forming a hole penetrating through the second barrier layer below the mask; and forming an opening overlapping the hole of the second barrier layer in the second base layer. 19 . An electronic apparatus comprising: a display panel comprising a first area, a second area spaced apart from the first area, and a first display area surrounding the first area and the second area; a first component corresponding to the first area of the display panel and on a rear surface of the display panel; and a second component corresponding to the second area of the display panel and on the rear surface of the display panel, wherein the display panel comprises: a substrate; a plurality of first sub-pixel circuits on the substrate and in the first display area; a plurality of first light-emitting diodes in the first display area and respectively electrically connected to the plurality of first sub-pixel circuits; a plurality of second li
Package configurations · CPC title
Interconnections, e.g. scanning lines · CPC title
of interconnections · CPC title
Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title
of packages · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.