Multilayer ceramic electronic device

Patent metadata

Field	Value
Publication number	US-2024071688-A1
Application number	US-202318362531-A
Country	US
Kind code	A1
Filing date	Jul 31, 2023
Priority date	Aug 25, 2022
Publication date	Feb 29, 2024
Grant date	—

Abstract

A multilayer ceramic electronic device includes a multilayer chip having a plurality of dielectric layers and a plurality of internal electrode layers facing each other through each of the plurality of dielectric layers, an external electrode that is provided on an end face of the multilayer chip in a second direction orthogonal to a first direction in which the plurality of internal electrode layers face each other, and has a plurality of glass portions that are spaced from each other on a surface of the external electrode, and a plated layer that is provided on the external electrode and has discontinuous portions on the plurality of glass portions.

First claim

What is claimed is:

1 . A multilayer ceramic electronic device comprising:
a multilayer chip having a plurality of dielectric layers and a plurality of internal electrode layers facing each other through each of the plurality of dielectric layers; an external electrode that is provided on an end face of the multilayer chip in a second direction orthogonal to a first direction in which the plurality of internal electrode layers face each other, and has a plurality of glass portions that are spaced from each other on a surface of the external electrode; and a plated layer that is provided on the external electrode and has discontinuous portions on the plurality of glass portions.

2 . The multilayer ceramic electronic device as claimed in claim 1 , wherein each of the plurality of glass portions is formed on the surface of the external electrode within each of circular shapes having a diameter of 10 μm or more and 30 μm or less.

3 . The multilayer ceramic electronic device as claimed in claim 1 , wherein each of the plurality of glass portions has a substantially circular shape in a planar view of the external electrode.

4 . The multilayer ceramic electronic device as claimed in claim 1 , wherein each of the plurality of glass portions has a concave central portion and a convex peripheral portion when viewed from a cross section direction of the external electrode.

5 . The multilayer ceramic electronic device as claimed in claim 1 , wherein a distance between center positions of at least two of the plurality of glass portions is more than 10 μm and less than 100 μm.

6 . The multilayer ceramic electronic device as claimed in claim 1 , wherein a distance between center positions of at least two of the plurality of glass portions is less than 63 μm.

7 . The multilayer ceramic electronic device as claimed in claim 1 , wherein the plurality of glass portions includes zirconium.

8 . The multilayer ceramic capacitor as claimed in claim 1 , wherein a main component of the external electrode is copper.

9 . The multilayer ceramic capacitor as claimed in claim 1 ,
wherein the external electrode extends to main faces of the multilayer chip located at ends in the first direction and side faces of the multilayer chip located at ends in a third direction orthogonal to the first direction and the second direction, and wherein the plurality of glass portions are distributed in a larger area on the main faces than on each of the side faces and the end faces.

10 . The ceramic electronic device as claimed in claim 1 , wherein a total area of the plurality of glass portions is 16% or more and 33% or less of an area of the external electrode.

Assignees

• Taiyo Yuden Kk

Inventors

• Nakamura Tomoaki
• Tahara Mikio
• Shimizu Hiroki
• Saito Masaru
• Inoue Tomio

Classifications

• H01G4/248 Primary

  the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/12 Primary

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/2325

  characterised by the material of the terminals · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title