Display panel, driving method, and display device

US2024038136A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024038136-A1
Application numberUS-202217897286-A
CountryUS
Kind codeA1
Filing dateAug 29, 2022
Priority dateJul 27, 2022
Publication dateFeb 1, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel, a driving method, and a display device are disclosed. The display panel includes a plurality of pixel units, a gate driver, a source driver, a plurality of feedback lines, and a control module. The display panel is provided with the plurality of feedback lines electrically connected to the gate driver and the control module, such that the control module can detect turn-on time of the pixel units respectively located in at least two pixel areas through the plurality of feedback lines and adjust time when the source driver outputs data signals according to the turn-on time. This solves an issue of uneven display brightness due to inconsistent pixel charging time in the prior art.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display panel, comprising: a plurality of pixel units arranged in an array and divided into at least two pixel areas arranged along a first direction; a plurality of scan lines arranged at intervals along a second direction, wherein one of the plurality of scan lines is connected to at least two pixel units in a same row; a plurality of data lines arranged at intervals along the first direction and insulated and intersected with the plurality of scan lines, wherein one of the plurality of data lines is connected to at least one pixel unit in a same column; a gate driver electrically connected with the plurality of scan lines; a source driver electrically connected with the plurality of data lines; a plurality of feedback lines, wherein one ends of the plurality of feedback lines are electrically connected to at least one of the plurality of scan lines, and the one ends of the plurality of feedback lines are distributed in the at least two pixel areas; and a control module electrically connected with the gate driver, the source driver, and another ends of the plurality of the feedback lines, wherein the control module is configured to detect turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and adjust time when the source driver outputs data signals according to the turn-on time. 2 . The display panel of claim 1 , wherein the control module comprises a timing controller, the timing controller is electrically connected to the gate driver, the source driver, and the another ends of the plurality of the feedback lines, the timing controller is configured to detect the turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and adjust the time when the source driver outputs the data signals according to the turn-on time. 3 . The display panel of claim 1 , wherein the control module comprises a timing controller and a microprocessor, the timing controller is electrically connected to the gate driver, the source driver, and the microprocessor, the microprocessor is electrically connected to the another ends of the plurality of the feedback lines, the microprocessor is configured to detect the turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and feed the turn-on time back to the timing controller, and the timing controller is configured to adjust the time when the source driver outputs the data signals according to the turn-on time. 4 . The display panel of claim 1 , wherein a number of columns of the pixel units spaced between the plurality of feedback lines is same. 5 . The display panel of claim 1 , wherein the turn-on time of the pixel units is time required for a voltage value of a scan signal of the pixel units to rise from 10% to 90% of a peak value of a scan signal voltage. 6 . The display panel of claim 1 , wherein the one ends of the plurality of the feedback lines are electrically connected to positions of a same scan line corresponding to the pixel units in a one-to-one correspondence. 7 . The display panel of claim 1 , wherein the control module is configured to adjust the time when the source driver outputs the data signals according to the turn-on time, such that the pixel units located in a same pixel area receive a same delay time of the data signals, and the delay time of the data signals applied in the pixel area closer to the gate driver is larger. 8 . The display panel of claim 7 , wherein an output time difference T of the data signals corresponding to the pixel units in the two pixel areas is: T=t n −t m , wherein t n represents the turn-on time of the pixel units in an nth pixel area along a direction away from the gate driver, t m represents the turn-on time of the pixel units in an mth pixel area along the direction away from the gate driver, wherein both n and m are positive integers, and n is greater than m. 9 . The display panel of claim 7 , wherein each of the pixel areas comprises at least two columns of pixel units, and the one ends of the plurality of the feedback lines are connected to a position of the scan line corresponding to one column of pixel units, the one column of pixel units is a feedback pixel unit column; an output time difference T′ of the data signals corresponding to the feedback pixel unit column in an adjacent pixel area is: T′=t n −t n-1 , wherein t n represents the turn-on time of the pixel units in an nth pixel area along a direction away from the gate driver, and t n-1 represents the turn-on time of the pixel units in an n−1th pixel area along the direction away from the gate driver; and wherein an output time of pixel unit columns other than the feedback pixel unit column in the pixel area is determined according to an output time interpolation of the data signals corresponding to nearest feedback pixel unit columns located on opposite sides of one of the pixel unit columns. 10 . A driving method for driving a display panel, comprising: dividing a plurality of pixel units into at least two pixel areas arranged along a first direction, providing a plurality of feedback lines, wherein the plurality of feedback lines are distributed in the at least two pixel areas; providing a plurality of scan signals to the pixel units and the pixel units to be turned on; detecting turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and adjusting time when a source driver outputs data signals according to the turn-on time. 11 . A display device, comprising: a display panel comprising: a plurality of pixel units arranged in an array and divided into at least two pixel areas arranged along a first direction; a plurality of scan lines arranged at intervals along a second direction, wherein one of the plurality of scan lines is connected to at least two pixel units in a same row; a plurality of data lines arranged at intervals along the first direction and insulated and intersected with the plurality of scan lines, wherein one of the plurality of data lines is connected to at least one pixel unit in a same column; a gate driver electrically connected with the plurality of scan lines; a source driver electrically connected with the plurality of data lines; a plurality of feedback lines, wherein one ends of plurality of the feedback lines are electrically connected to at least one of the plurality of scan lines, and the one ends of the plurality of the feedback lines are distributed in the at least two pixel areas; and a control module electrically connected with the gate driver, the source driver, and another ends of the plurality of the feedback lines, wherein the control module is configured to detect turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and adjust time when the source driver outputs data signals according to the turn-on time. 12 . The display device of claim 11 , wherein the control module comprises a timing controller, the timing controller is electrically connected to the gate driver, the source driver, and the another ends of the plurality of the feedback lines, the timing controller is configured to detect the turn-on time of the pixel units respectively located in the at least two pixel areas through the plurality of feedback lines and adjust the time when the source driver outputs the data signals according to the turn-on time. 13 . The display device of cl

Assignees

Inventors

Classifications

  • G09G3/2096Primary

    Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

  • Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays · CPC title

  • Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current · CPC title

  • Improving the luminance or brightness uniformity across the screen · CPC title

  • G09G3/20Primary

    for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

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What does patent US2024038136A1 cover?
A display panel, a driving method, and a display device are disclosed. The display panel includes a plurality of pixel units, a gate driver, a source driver, a plurality of feedback lines, and a control module. The display panel is provided with the plurality of feedback lines electrically connected to the gate driver and the control module, such that the control module can detect turn-on time …
Who is the assignee on this patent?
Tcl China Star Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/2096. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Feb 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).