Systems and methods for operating pixels in a display to mitigate image flicker

Patent metadata

Field	Value
Publication number	US-2024029686-A1
Application number	US-202318451378-A
Country	US
Kind code	A1
Filing date	Aug 17, 2023
Priority date	May 28, 2011
Publication date	Jan 25, 2024
Grant date	—

Abstract

Circuits for programming a circuit with decreased programming time are provided. Such circuits include a storage device such as a capacitor for storing display information and for ensuring a driving device such as a driving transistor drives a light emitting device according to the display information. The present disclosure provides driving schemes for decreasing flickering perceived while displaying video content by introducing idle phases in between in emission phases to increase the effective refresh rate of a display. Driving schemes are also disclosed for reducing the effects of cross-talk by ensuring that programming information is refreshed in a display array that utilizes a driver connected to multiple data lines via a multiplexer.

First claim

1 - 21 . (canceled)

22 . A display system comprising:
a plurality of data lines; a plurality of pixels, each including a light emitting device and a storage capacitor coupled directly to a data line for receiving programming information conveyed via said data line; a source driver for providing the programming information to the data lines via a plurality of data output terminals; a plurality of demultiplexers, each demultiplexer including an input coupled to a respective one of the data output terminals, and a plurality of outputs coupled to a respective subset of the plurality of data lines; and a controller configured to operate the source driver to initiate a programming select cycle by sequentially coupling each data output terminal via a respective demultiplexer to the respective subset of data lines one at a time to selectively program each storage capacitor of each pixel with programming information, and to initiate an emission cycle to emit light from the light emitting devices according to the programming information stored in each pixel.

23 . The display system according to claim 22 , wherein the controller is further configured to operate the source driver to initiate pre-charging cycles to pre-charge a parasitic capacitance of the subset of data lines with respective programming information prior to the subset being selected for programming such that, once selected, the selected pixels programmed via the subset of data lines are programmed according to the voltage programming information charged on the parasitic capacitance of the respective ones of the subset of data lines.

24 . The display system according to claim 23 , wherein the controller is further configured to operate the source driver such that the programming of the subset occurs after the entire duration of the pre-charging of the final one of the subset of the plurality of data lines.

25 . The display system according to claim 23 , wherein the controller is further configured to operate the source driver, such that the programming of the subset occurs during the pre-charging of the final one of the subset of the plurality of data lines.

26 . The display system according to claim 23 , wherein a duration of the programming select cycle is equal to a duration of one of the individual pre-charging cycles

27 . The display system according to claim 23 , wherein a duration of the programming select cycle is equal to a cumulative duration of all the pre-charging cycles.

28 . The display system according to claim 22 , further comprising a plurality of address lines, one for each of the outputs of the demultiplexer, whereby pixels in a same row are separately selected sequentially to align each selection according to the order of the demultiplexer in providing programming information to the respective data lines.

29 . The display system according to claim 22 , wherein each subset of data lines corresponds to a red, a green, and a blue subpixel.

30 . The display system according to claim 22 , wherein the controller is configured to initiate the emission cycle for all the pixels of the display system simultaneously.

31 . The display system according to claim 22 , wherein the light emitting devices in the plurality of pixel circuits include organic light emitting diodes.

32 . A method of driving a display system comprising a plurality of data lines, a plurality of pixels, each pixel including a light emitting device and a storage capacitor coupled directly to a data line for receiving programming information conveyed via said data line, a source driver for providing the programming information to the data lines via a plurality of data output terminals, and a plurality of demultiplexers, each demultiplexer including an input coupled to a respective one of the data output terminals, and a plurality of outputs coupled to a respective subset of the plurality of data lines, the method comprising:
a) executing a programming select cycle by sequentially coupling each data output terminal via a respective demultiplexer to the respective subset of data lines, one at a time, to selectively program each storage capacitor of each pixel with programming information, and b) executing an emission cycle to emit light from the light emitting devices according to the programming information stored in each pixel.

33 . The method according to claim 32 , wherein step a) includes:
i) sequentially coupling, via one of the demultiplexers, a subset of the plurality of data lines to one of the data output terminals of the source driver to thereby pre-charge respective parasitic capacitances of the subset of the plurality of data lines; and ii) selecting for programming, via an address driver, pixels coupled to the subset of the plurality of data lines, so as to program the pixels according to the charge stored on the respective parasitic capacitances of the subset of the plurality of data lines.

34 . The method according to claim 33 , wherein the selecting is initiated during the coupling of the final one of the subset of the plurality of data lines by the demultiplexer.

35 . The method according to claim 33 , wherein the selecting is initiated after the entire duration of the coupling of the final one of the subset of the plurality of data lines by the demultiplexer.

36 . The method according to claim 33 , wherein a duration of step a) i) is substantially equal to a duration of pre-charging one of the data lines.

37 . The method according to claim 33 , wherein a duration step a) i) is substantially equal to a duration of pre-charging all the data lines in the respective subset.

38 . The display system according to claim 22 , wherein the display further comprising a plurality of address lines, one for each of the outputs of the demultiplexer, and wherein step a) includes separately selected and programming pixels in a same row sequentially to align each selection according to the order of the demultiplexer in providing programming information to the respective data lines.

39 . The method according to claim 32 , wherein each subset of data lines corresponds to a red, a green, and a blue subpixel.

40 . The method according to claim 32 , wherein step b) including executing the emission cycle for all the pixels of the display system simultaneously.

41 . The method according to claim 32 , wherein the light emitting devices in the plurality of pixel circuits include organic light emitting diodes.

Assignees

• Ignis Innovation Inc

Inventors

• Chaji Gholamreza
• Sun Lai Jackson Chi
• Azizi Yaser
• Ma Maran Ran

Classifications

• G09G5/10 Primary

  Intensity circuits · CPC title

• G09G3/3275 Primary

  Details of drivers for data electrodes · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2310/0224

  Details of interlacing · CPC title

• G09G2310/0251

  Precharge or discharge of pixel before applying new pixel voltage · CPC title