3d printable feedstock inks for signal control or computation

Patent metadata

Field	Value
Publication number	US-2024006390-A1
Application number	US-202318451234-A
Country	US
Kind code	A1
Filing date	Aug 17, 2023
Priority date	Dec 13, 2018
Publication date	Jan 4, 2024
Grant date	—

Abstract

The present disclosure relates to a method for forming an electrically conductive ink able to be deposited through a print nozzle during a 3D printing operation. The method may involves providing an electrically non-conductive flowable material adapted to be flowed through a print nozzle during a 3D printing operation. A predetermined quantity of chiplets may then be mixed into flowable material, in accordance with a predefined percolation threshold, to form a percolating chiplet network within the polymer as the ink is flowed through the print nozzle and deposited on a surface. The chiplets each form an engineered electronic component, and ones of the chiplets randomly connect, in accordance with the predefined percolation threshold, to form an electrically conductive circuit having a predetermined circuit characteristic.

First claim

What is claimed is:

1 . A method for forming an electrically conductive ink able to be deposited through a print nozzle during a 3D printing operation, comprising:
providing an electrically non-conductive flowable material adapted to be flowed through a print nozzle during a 3D printing operation; mixing a predetermined quantity of chiplets, in accordance with a predefined percolation threshold, into the non-conductive flowable material to form a percolating chiplet network within the polymer as the ink is flowed through the print nozzle and deposited on a surface, wherein the chiplets each form an engineered electronic component, and ones of the chiplets randomly connect, in accordance with the predefined percolation threshold, to form an electrically conductive circuit having a predetermined circuit characteristic.

2 . The method of claim 1 , wherein the percolating chiplet network formed by the chiplets implements a predetermined logic function.

3 . The method of claim 2 , wherein the predetermined logic function comprises at least one of:
a diode logic function; a silicon controlled rectifier logic function; a Zener diode logic function; or a thyristor logic function; a transistor logic function.

4 . The method of claim 3 , wherein the predetermined logic function comprises at least two of:
a diode logic function; a silicon controlled rectifier logic function; a Zener diode logic function; or a thyristor logic function; a transistor logic function.

5 . The method of claim 1 , wherein the predetermined circuit characteristic forms an inductance.

6 . The method of claim 1 , wherein the providing a non-conductive flowable material comprises providing a non-conductive flowable polymer.

7 . The method of claim 1 , wherein the mixing a predetermined quantity of chiplets into the non-conductive flowable material comprises mixing a plurality of chiplets which each comprise a logic section, a first conductive portion forming a first conductive leg, and a second conductive portion forming a second conductive leg, with the predetermined circuit characteristic forming a logic portion, and the logic portion being located between the first and second conductive portions and in electrical communication with the first and second conductive portions.

8 . The method of claim 1 , further comprising mixing in a predetermined plurality of nanoscale elements into the non-conductive flowable material along with the predetermined quantity of chiplets, the predetermined plurality of nanoscale elements aiding in forming the engineered electronic circuit.

9 . The method of claim 1 , wherein the mixing in a predetermined plurality of chiplets comprises mixing in a predetermined plurality of chiplets each having a shape in accordance with at least one of:
a rectangular shape; an oval shape; an elliptical shape; a frusto-conical shape; a cylindrical shape; or a pyramid shape.

10 . The method of claim 1 , wherein the mixing in a predetermined plurality of chiplets comprises mixing in a plurality of microcoils.

11 . The method of claim 10 , further comprising applying at least one of a current or a magnetic field after depositing the ink to effect a controlled curing process in which the microcoils aligned in a desired orientation within the electrically non-conductive material.

12 . The method of claim 1 , further comprising mixing in at least one of a ferro fluid or a magnetorheological fluid into the non-conductive material along with the predetermined quantity of chiplets.

13 . The method of claim 1 , wherein the mixing in a predetermined quantity of chiplets comprises mixing in a predetermined quantity of chiplets each having at least one of the following dimensional feature:
a length of about 200 microns; or a width of about 20 microns; or a thickness of about 20 microns.

14 . The method of claim 1 , wherein the mixing in a predetermined quantity of chiplets comprises mixing in a predetermined quantity of chiplets having different dimensions.

15 . The method of claim 1 , wherein the ink, once deposited on the surface, further includes at least one of the following properties:
being flexible; having a shape memory property; or having an inductive property.

16 . A method for forming an electrically conductive ink able to be deposited through a print nozzle during a 3D printing operation, comprising:
providing an electrically non-conductive flowable polymer material adapted to be flowed through a print nozzle during a 3D printing operation; mixing a predetermined quantity of chiplets, in accordance with a predefined percolation threshold, into the non-conductive flowable polymer to form a percolating chiplet network within the polymer as the ink is flowed through the print nozzle and deposited on a surface, wherein at least a subportion of the predetermined quantity of chiplets each form an engineered electronic component providing a logic function, and ones of the chiplets randomly connect, in accordance with the predefined percolation threshold, to form an electrically conductive circuit having a predetermined circuit characteristic.

17 . The method of claim 16 , wherein mixing in a predetermined quantity of chiplets comprises mixing in chiplets of having two different types of predetermined logic functions.

18 . The method of claim 16 , further comprising mixing in a quantity of at least one of a ferrofluid or a magnetorheological fluid into the electrically non-conductive polymer.

19 . The method of claim 16 , further comprising mixing in a quantity of electrically conductive elements into the electrically non-conductive polymer along with the predetermined quantity of chiplets.

20 . A method for forming an electrically conductive ink able to be deposited through a print nozzle during a 3D printing operation, comprising:
providing an electrically non-conductive flowable polymer material adapted to be flowed through a print nozzle during a 3D printing operation; mixing a predetermined quantity of chiplets, in accordance with a predefined percolation threshold, into the non-conductive flowable polymer to form a percolating chiplet network within the polymer as the ink is flowed through the print nozzle and deposited on a surface, wherein at least a subportion of the predetermined quantity of chiplets each form an engineered electronic component providing a logic function, and ones of the chiplets randomly connect, in accordance with the predefined percolation threshold, to form an electrically conductive circuit having a predetermined circuit characteristic; wherein at least a subquantity of the predetermined quantity of chiplets includes chiplets having at least one of: a rectangular shape; an oval shape; an elliptical shape; a frusto-conical shape; a cylindrical shape; a pyramid shape; a coil shape; and
wherein the predetermined logic function includes at least one of:
a diode logic function;
a silicon controlled rectifier logic function;
a Zener diode logic function; or
a thyristor logic function;
a transistor logic function.

Assignees

• L Livermore Nat Security Llc

Inventors

• Murialdo Maxwell
• Kanarska Yuliya
• Pascall Andrew J

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H01L25/16 Primary

  Electricity · mapped topic

• H01L25/50

  Electricity · mapped topic