Multilayer wiring board

Patent metadata

Field	Value
Publication number	US-2023422412-A1
Application number	US-202318244182-A
Country	US
Kind code	A1
Filing date	Sep 8, 2023
Priority date	Mar 10, 2021
Publication date	Dec 28, 2023
Grant date	—

Abstract

A multilayer wiring board includes two or more layers laminated together, each layer includes an insulating resin layer having a first surface and a second surface, and a conductor layer. The insulating resin layer includes a first recess that is open to the first surface, a groove section that is open to the first surface, and a second recess that is open to the second surface and communicates with one or more of the first recesses. Each insulating resin layer is integrally formed in a thickness direction thereof. The conductor layer includes a land portion and a wiring portion filling the first recess and the groove section, and a via portion protruding from the first surface at a position of the land portion. The via portion protruding from the first surface of the insulating resin layer fills a recess of another insulating resin layer adjacent to the first surface.

First claim

What is claimed is:

1 . A multilayer wiring board, comprising:
two or more layers laminated together, each of the two or more layers including: an insulating resin layer having a first surface and a second surface which is a rear surface thereof, the insulating resin layer including a first recess that is open to the first surface, a groove section that is open to the first surface, and a second recess that is open to the second surface and communicates with one or more of the first recesses, the insulating resin layer being integrally formed in a thickness direction thereof; and a conductor layer including a land portion and a wiring portion filling the first recess and the groove section of the insulating resin layer, respectively, and a via portion protruding from the first surface at a position of the land portion, the via portion filling a recess of another insulating resin layer adjacent to the first surface.

2 . The multilayer wiring board of claim 1 , wherein
each of the two or more layers further includes an inorganic insulating layer including a portion covering the first surface.

3 . The multilayer wiring board of claim 2 , wherein
the inorganic insulating layer further includes a portion closing an aperture of the groove section, and a portion covering a peripheral portion of a surface on the first surface side of the land portion.

4 . The multilayer wiring board of claim 2 , wherein
the inorganic insulating layer is composed of the portion covering the first surface.

5 . The multilayer wiring board of claim 1 , wherein
each of the two or more layers further includes an inorganic insulating layer including a portion covering a bottom of the groove section and a portion covering a bottom of the first recess.

6 . The multilayer wiring board of claim 5 , wherein
the inorganic insulating layer further includes a portion covering a side wall of the first recess and a portion covering a side wall of the groove section.

7 . The multilayer wiring board of claim 6 , wherein
the inorganic insulating layer further includes a portion covering the first surface.

8 . The multilayer wiring board of claim 1 , wherein
each of the two or more layers includes: a first inorganic insulating layer including a first portion covering the first surface, a second portion closing an aperture of the groove section, and a third portion covering a peripheral portion of a surface on the first surface side of the land portion; and a second inorganic insulating layer including a portion covering a bottom of the groove section, and a portion covering a bottom of the first recess.

9 . The multilayer wiring board of claim 8 , wherein
the second inorganic insulating layer includes a portion covering a side wall of the first recess, a portion covering a side wall of the groove section, and a portion interposed between the first surface and the first portion covering the first surface.

10 . The multilayer wiring board of claim 1 , wherein
each of the two or more layers further includes an inorganic insulating layer including a first portion covering the first surface, a second portion covering a bottom of the groove section, and a third portion covering a bottom of the first recess.

11 . The multilayer wiring board of claim 10 , wherein
the first portion is thicker than each of the second portion and the third portion.

12 . The multilayer wiring board of claim 10 , wherein
the inorganic insulating layer further includes a fourth portion covering a side wall of the first recess, and a fifth portion covering a side wall of the groove section, and the first portion is thicker than each of the fourth portion and the fifth portion.

13 . The multilayer wiring board of claim 10 , wherein
the first portion has a two-layer structure, and a portion of the inorganic insulating layer other than the first portion has a single-layer structure.

14 . The multilayer wiring board of claim 10 , wherein
the inorganic insulating layer includes a first inorganic insulating layer and a second inorganic insulating layer, the first inorganic insulating layer covering the first surface with the second inorganic insulating layer interposed therebetween, the first inorganic insulating layer having a through hole and a slit at a position of the first recess and a position of the groove section, respectively, and the second inorganic insulating layer extending across the entire inorganic insulating layer.

15 . The multilayer wiring board of claim 1 , wherein
the first recess and the groove section have a cross-section in an inverted tapered shape, and the second recess has a cross-section in a forward tapered shape.

16 . The multilayer wiring board of claim 1 , wherein
each of the two or more layers further includes a first metal-containing layer covering side surfaces of the land portion, the via portion and the wiring portion, a surface on an aperture side of the groove section of the wiring portion, and a peripheral portion of a surface on the first surface side of the land portion.

17 . The multilayer wiring board of claim 16 , wherein
each of the two or more layers further includes a second metal-containing layer interposed between the first metal-containing layer and the conductor layer, the second metal-containing layer being made of the same material as the conductor layer or a metal material having a lower ionization tendency than the material of the conductor layer.

18 . A composite wiring board, comprising:
a first wiring board; and a second wiring board bonded to the first wiring board, wherein the first wiring board and the second wiring board are electrically connected to each other via bonding electrodes interposed therebetween, and the second wiring board is the multilayer wiring board of claim 1 .

19 . A packaged device comprising:
the composite wiring board of claim 18 ; and a functional device mounted on a surface of the second wiring board opposite to that facing the first wiring board.

20 . A method of producing a multilayer wiring board, the method comprising the steps of:
forming two or more layers laminated together, the step of forming two or more layers including: forming a dummy layer on a foundation layer having a recess, the dummy layer having a groove and a through hole, the recess communicating with one or more of the through holes; forming a conductor layer on the dummy layer, the conductor layer filling the recess, the groove and the through hole; polishing the conductor layer to remove portions of the conductor layer located outside the recess, the groove and the through hole and obtain portions of the conductor layer filling the recess, the through hole and the groove as a via portion, a land portion and a wiring portion, respectively; removing the dummy layer following the step of polishing; and forming an insulating resin layer on the foundation layer and the conductor layer, the insulating resin layer covering the via portion, the land portion and the wiring portion while filling gaps therebetween, and the insulating resin layer having a recess at one or more positions of the land portion.

Assignees

• Toppan Inc

Inventors

• Hayashi Akihiro
• Tanabe Masahito
• Tsuchida Tetsuyuki

Classifications

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W70/655

  Fan-out layouts · CPC title