Thin film transistor and method of manufactruting thin film transistor

Patent metadata

Field	Value
Publication number	US-2023420573-A1
Application number	US-202318466013-A
Country	US
Kind code	A1
Filing date	Sep 13, 2023
Priority date	Mar 15, 2021
Publication date	Dec 28, 2023
Grant date	—

Abstract

A gate insulating layer of a thin film transistor includes a first gate insulating coating including an organic polymer compound or an organic-inorganic composite material, and a second gate insulating coating including one selected from a group of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. The second gate insulating coating is sandwiched between the first gate insulating coating and a semiconductor layer. The first gate insulating coating has a thickness of 100 nm or greater and 1500 nm or less, and a product of the thickness and Young's modulus of the first gate insulating coating is 300 nm·GPa or greater and 30000 nm·GPa or less. The second gate insulating coating has a thickness of 2 nm or greater and 30 nm or less, and a product of the thickness and Young's modulus of the second gate insulating coating is 100 nm·GPa or greater and 9000 nm·GPa or less.

First claim

1 . A thin film transistor, comprising:
a flexible substrate having a support surface; a gate electrode layer formed in a first part of the support surface of the flexible substrate; a gate insulating layer covering the gate electrode layer and a second part of the support surface of the flexible substrate; a semiconductor layer formed such that the semiconductor layer and the gate electrode layer are sandwiching the gate insulating layer; a source electrode layer formed in contact with a first end of the semiconductor layer such that no insulating layer is formed between the source electrode layer and the semiconductor layer; and a drain electrode layer formed in contact with a second end of the semiconductor layer such that no insulating layer is formed between the drain electrode layer and the semiconductor layer, wherein the gate insulating layer includes a first gate insulating coating and a second gate insulating coating such that the first gate insulating coating comprises an organic polymer compound or an organic-inorganic composite material and is covering the second part and the gate electrode layer and that the second gate insulating coating comprises one compound selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide and is sandwiched between the first gate insulating coating and the semiconductor layer, the first gate insulating coating has a thickness in a range of 100 nm to 1500 nm and a product of the thickness and Young's modulus in a range of 300 nm·GPa to 30000 nm·GPa, and the second gate insulating coating has a thickness in a range of 2 nm to 30 nm and a product of the thickness and Young's modulus of the second gate insulating coating in a range of 100 nm·GPa to 9000 nm·GPa.

2 . The thin film transistor according to claim 1 , wherein the semiconductor layer has a thickness in a range of 15 nm to 50 nm.

3 . The thin film transistor according to claim 1 , wherein the semiconductor layer is an oxide semiconductor layer comprising indium.

4 . A thin film transistor, comprising:
a flexible substrate having a support surface; a gate electrode layer located in a first part of the support surface of the flexible substrate; a gate insulating layer covering the gate electrode layer and a second part of the support surface of the flexible substrate; a semiconductor layer formed such that the semiconductor layer and the gate electrode layer are sandwiching the gate insulating layer; a protective layer formed such that the protective layer is covering the semiconductor layer and exposing first and second regions on an upper surface of the semiconductor layer; a source electrode layer formed such that the source electrode layer is in contact with the first region on the upper surface of the semiconductor layer; and a drain electrode layer formed such that the drain electrode layer is in contact with the second region on the upper surface of the semiconductor layer, wherein the protective layer comprises an organic polymer compound or an organic-inorganic composite material, the gate insulating layer includes a first gate insulating coating and a second gate insulating coating such that the first gate insulating coating comprises an organic polymer compound or an organic-inorganic composite material and is covering the second part and the gate electrode layer and that the second gate insulating coating comprises one compound selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide and is sandwiched between the first gate insulating coating and the semiconductor layer, the first gate insulating coating has a thickness in a range of 100 nm to 1500 nm and a product of the thickness and Young's modulus in a range of 300 nm·GPa to 30000 nm·GPa, and the second gate insulating coating has a thickness in a range of 2 nm to 30 nm and a product of the thickness and Young's modulus of the second gate insulating coating in a range of 100 nm·GPa to 9000 nm·GPa.

5 . The thin film transistor according to claim 4 , wherein the protective layer has a thickness in a range of 40 nm to 1000 nm and a product of the thickness and Young's modulus of the protective layer is in a range of 120 nm·GPa to 20000 nm·GPa.

6 . The thin film transistor according to claim 4 , wherein the semiconductor layer has a thickness in a range of 15 nm to 50 nm, and the protective layer has a product of the thickness and Young's modulus of the protective layer is 1500 nm·GPa or greater and 7500 nm·GPa or less.

7 . The thin film transistor according to claim 4 , wherein the semiconductor layer is an oxide semiconductor layer comprising indium.

8 . The thin film transistor according to claim 5 , wherein the semiconductor layer has a thickness in a range of 15 nm to 50 nm, and the protective layer has a product of the thickness and Young's modulus of the protective layer is 1500 nm·GPa or greater and 7500 nm·GPa or less.

9 . The thin film transistor according to claim 5 , wherein the semiconductor layer is an oxide semiconductor layer comprising indium.

10 . A thin film transistor, comprising:
a flexible substrate having a support surface; a gate electrode layer located in a first part of the support surface of the flexible substrate; a gate insulating layer covering the gate electrode layer and a second part of the support surface of the flexible substrate; a semiconductor layer formed such that the semiconductor layer and the gate electrode layer are sandwiching the gate insulating layer; a protective layer formed such that the protective layer is covering the semiconductor layer and exposing first and second regions on an upper surface of the semiconductor layer; a source electrode layer formed such that the source electrode layer is in contact with the first region on the upper surface of the semiconductor layer; and a drain electrode layer formed such that the drain electrode layer is in contact with the second region on the upper surface of the semiconductor layer, wherein the protective layer comprises silicon oxide, silicon nitride or silicon oxynitride, the gate insulating layer includes a first gate insulating coating and a second gate insulating coating such that the first gate insulating coating comprises an organic polymer compound or an organic-inorganic composite material and is covering the second part and the gate electrode layer and that the second gate insulating coating comprises one compound selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide and is sandwiched between the first gate insulating coating and the semiconductor layer, the first gate insulating coating has a thickness in a range of 100 nm to 1500 nm and a product of the thickness and Young's modulus in a range of 300 nm·GPa to 30000 nm·GPa, and the second gate insulating coating has a thickness in a range of 2 nm to 30 nm and a product of the thickness and Young's modulus of the second gate insulating coating in a range of 100 nm·GPa to 9000 nm·GPa.

11 . The thin film transistor according to claim 10 , wherein the semiconductor layer has a thickness in a range of 15 nm to 50 nm, and the protective layer has a product of the thickness and Young's modulus of the protective layer is 1500 nm·GPa or greater and 7500 nm·GPa or less.

12 . The thin film transistor according to claim 10 , wherein the semiconductor layer is an oxide semiconductor layer comprising indium.

13 . A method of manufacturing a thin film transistor, comprising:
forming a gate electrode layer on a first part of a support surface of a flexible substrate; forming a

Assignees

• Toppan Inc

Inventors

• Imamura Chihiro
• Ito Manabu

Classifications

• H10P14/6342

  Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• H10P14/6682

  the compound being a silane, e.g. disilane, methylsilane or chlorosilane · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title