Card and host apparatus

US2023418363A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023418363-A1
Application numberUS-202318462493-A
CountryUS
Kind codeA1
Filing dateSep 7, 2023
Priority dateDec 27, 2004
Publication dateDec 28, 2023
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.

First claim

Opening claim text (preview).

1 . A memory device connectable to a host device, the memory device comprising: a memory core; and a memory controller configured to: control the memory core, transmit, in response to a first command from the host device, a response of status data that is used to determine whether the memory device supports a termination process, the termination process including shifting into a state ready for a stop of power supply from the host device, perform the termination process in response to a second command from the host device, transmit a first signal indicative of a busy state while performing the termination process, the first signal being indicative of the busy state and having a first level, and notify the host device of completion of the busy state by transmitting a second signal indicative of a ready state and having a second level when the memory device completes the termination process and is ready for the stop of power supply to the memory device.

Assignees

Inventors

Classifications

  • G06F1/3296Primary

    by lowering the supply or operating voltage · CPC title

  • Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title

  • Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands · CPC title

  • Power saving in PCMCIA card · CPC title

  • G06F3/0619Primary

    in relation to data integrity, e.g. data losses, bit errors · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2023418363A1 cover?
A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.
Who is the assignee on this patent?
Kioxia Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/3296. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Dec 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).