Display device, method of fabricating the same, and tiled display device

US2023402436A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023402436-A1
Application numberUS-202318328875-A
CountryUS
Kind codeA1
Filing dateJun 5, 2023
Priority dateJun 8, 2022
Publication dateDec 14, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device may include light emitting elements disposed on a first surface of a substrate, a connection electrode disposed on a second surface of the substrate, and a via layer disposed on the connection electrode, and including at least one depression. The passivation layer may be disposed in the depression of the via layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: light emitting elements disposed on a first surface of a substrate; a connection electrode disposed on a second surface of the substrate, a via layer disposed on the connection electrode, and including at least one depression; and a passivation layer disposed in the depression of the via layer. 2 . The display device according to claim 1 , wherein the depression includes a first depressed pattern, and the first depressed pattern extends in a first direction. 3 . The display device according to claim 2 , wherein the depression further includes a second depressed pattern, and the second depressed pattern is spaced apart from the first depressed pattern. 4 . The display device according to claim 3 , wherein the second depressed pattern extends in the first direction. 5 . The display device according to claim 2 , wherein the depression further includes a second depressed pattern, and the second depressed pattern extends in a second direction intersecting the first direction. 6 . The display device according to claim 5 , wherein the depression further includes a third depressed pattern, and the third depressed pattern intersects the first depressed pattern and the second depressed pattern. 7 . The display device according to claim 1 , wherein the passivation layer physically contacts the via layer. 8 . The display device according to claim 1 , wherein the depression of the via layer includes a first surface, a second surface facing the first surface, and a third surface disposed between the first surface and the second surface. 9 . The display device according to claim 8 , wherein the passivation layer physically contacts at least one of the first surface, the second surface, and the third surface of the depression of the via layer. 10 . The display device according to claim 1 , further comprising: at least one transistor disposed on the first surface of the substrate. 11 . The display device according to claim 10 , further comprising: electrodes that electrically connect the transistor to the light emitting elements. 12 . A method of fabricating a display device, comprising: forming a front pattern on a first surface of a substrate; forming a rear pattern on a second surface of the substrate; forming a via layer on the rear pattern; forming at least one depression by etching the via layer; and forming a passivation film on the via layer, wherein the passivation film is provided in the depression of the via layer. 13 . The method according to claim 12 , further comprising: forming a passivation layer on the via layer. 14 . The method according to claim 13 , wherein the passivation layer is provided in the depression of the via layer. 15 . The method according to claim 14 , wherein the passivation layer physically contacts the via layer. 16 . The method according to claim 15 , wherein the passivation film physically contacts the passivation layer provided in the depression. 17 . The method according to claim 12 , wherein the forming of the depression comprises forming a first depressed pattern extending in a first direction. 18 . The method according to claim 17 , wherein the forming of the depression further comprises forming a second depressed pattern intersecting the first depressed pattern. 19 . The method according to claim 12 , wherein the forming of the passivation film comprises hardening a passivation-film material layer provided in the depression of the via layer. 20 . The method according to claim 19 , wherein the passivation-film material layer is provided by an inkjet printing operation. 21 . A tiled display device comprising: display devices adjacent to each other; and a seam connecting the display devices to each other, wherein each of the display devices comprises: light emitting elements disposed on a first surface of a substrate; a connection electrode disposed on a second surface of the substrate; a via layer disposed on the connection electrode, and including at least one depression; and a passivation layer disposed in the depression of the via layer. 22 . The tiled display device according to claim 21 , wherein each of the light emitting elements comprises a flip-chip-type micro light emitting diode (LED).

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • Interconnections, e.g. scanning lines · CPC title

  • of multiple TFTs · CPC title

  • H10H29/142Primary

    Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

  • extending at least partially through the bodies · CPC title

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Frequently asked questions

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What does patent US2023402436A1 cover?
A display device may include light emitting elements disposed on a first surface of a substrate, a connection electrode disposed on a second surface of the substrate, and a via layer disposed on the connection electrode, and including at least one depression. The passivation layer may be disposed in the depression of the via layer.
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 14 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).